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STM32MP13 ADC internal peripheral
1 Article purpose
The purpose of this article is to
- briefly introduce the ADC peripheral and its main features
- indicate the level of security supported by this hardware block
- explain how each instance can be allocated to the runtime contexts and linked to the corresponding software components
- explain how to configure the ADC peripheral.
2 Peripheral overview
The STM32 ADC is a successive approximation analog-to-digital converter.
The STM32MP13x SoCs have two ADC blocks, except for the STM32MP131 SoC which has only one ADC block. There is one physical ADC per block:
- Each ADC has up to 19 multiplexed channels (including 6 internal channels available only on ADC2).
- Configurable resolution: 6, 8, 10, 12 bits.
- The conversions can be performed in single, continuous, scan or discontinuous mode.
- The result can be read in a left- or right-aligned 32-bit data register by using CPU or DMA.
- The analog watchdog feature allows the application to detect if the input voltage goes beyond the user-defined, high or low thresholds.
- Each ADC clock can be selected between two different clock sources (Synchronous or Asynchronous clock).
- The common reference voltage can be provided by either VREFBUF or any other external regulator wired to VREF+ pin.
Each ADC supports two contexts to manage conversions:
- Regular conversions can be done in sequence, running in background
- Injected conversions have higher priority, and so have the ability to interrupt the regular sequence (either triggered in SW or HW). The regular sequence is resumed, in case it has been interrupted.
- Each context has its own configurable sequence and trigger: software, TIM, LPTIM and EXTI.
Refer to STM32MP13 reference manuals for the complete features list, and to the software components, introduced below, to know which features are really implemented.
2.2 Security support
Both ADC1 and ADC2 are secure peripherals (under ETZPC control).
3 Peripheral usage and associated software
3.1 Boot time
The ADC is usually not used at boot time. But it may be used by the SSBL (see Boot chain overview), to check for power supplies for example.
The ADCs can be allocated to:
- the Arm® Cortex®-A7 non-secure core to be used under Linux® with IIO framework.
- the Arm® Cortex®-A7 secure core.
The Peripheral assignment chapter describes which peripheral instance can be assigned to which context.
3.2.2 Software frameworks
3.2.3 Peripheral configuration
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration by itself can be performed via the STM32CubeMX tool for all internal peripherals. It can then be manually completed (especially for external peripherals) according to the information given in the corresponding software framework article.
For the Linux kernel configuration, please refer to ADC device tree configuration and ADC OpenSTLinux drivers articles.
3.2.4 Peripheral assignment
Click on the right to expand the legend...
Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:
- ☐ means that the peripheral can be assigned (☑) to the given runtime context.
- ⬚ means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
- ✓ is used for system peripherals that cannot be unchecked because they are statically connected in the device.
Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP13 reference manuals.
|Analog||ADC||ADC1||⬚||☐||Assignment (single choice)|
|ADC2||☐||☐||Assignment (single choice)|
ADC2 can be used for system supplies monitoring
4 How to go further
See application notes:
- How to get the best ADC accuracy in STM32.