1. Article purpose[edit source]
The purpose of this article is to provide information on the Arm® CoreSight™ hardware subsystem.
It explains what are the principle peripherals of this subsystem.
2. Peripheral overview[edit source]
Arm® CoreSight™ products include
- a wide range of trace macrocells for Arm® processors,
To enable the debug and trace of the most complex, multi-core SoCs, Arm® CoreSight™ products include
- a system and software instrumentation,
- and a comprehensive set of IP blocks.
Arm® has defined an open CoreSight™architecture to allow SoC designers to add "debug and trace" capabilities for other IP cores in to the CoreSight™ infrastructure.
2.1. Components description[edit source]
The debug features are based on Arm® CoreSight™ components
More information about these components can be found in the Arm® website [1]
2.2. Features[edit source]
Refer to the Debug support (DBG) chapter of reference manuals corresponding to the STM32 MPU, you use, for the complete list of features, and to the software components, introduced above, to see which features are really implemented.
3. Peripheral usage[edit source]
Arm® CoreSight™ components can not be assigned neither at boot time nor at runtime.
Arm® CoreSight™ components are accessible from external debuggers only when debug is activated, e.g. in production mode by using the wrapper for FSBL.
4. Software frameworks and drivers[edit source]
There is no embedded software dedicated to the CoreSight™internal peripheral delivered with STM32MPU ecosystem. Nevertheless, debugging tools use them through an external probe.
5. References[edit source]