STM32CubeMP13 Package architecture

Applicable for

1. Article purpose[edit | edit source]

This article introduces STM32CubeMP13 Package (a.k.a., STM32CubeMP13) architecture based on the Arm^® Cortex^®-A7 processor.

Refer to STM32CubeMP13 Package - Getting started article to get started.

2. Architecture overview[edit | edit source]

The STM32CubeMP13 Package gathers together, in a single package, all the generic embedded software components required to develop applications on top of Arm^® Cortex^®-A7 microprocessors.

On top of the hardware, the STM32CubeMP13 Package solution is built around three levels of software components (Level 0 for Drivers, level 1 for Middleware. Level 2 for Boards demonstrations), that interact easily with each other. It also includes 2 common components CMSIS and Utilities which interact with all two levels.

Information

Notes:

HAL drivers deal with the STM32MP13 internal peripherals
BSP drivers deal with the boards configuration and high-level APIs.

3. Boot architecture overview[edit | edit source]

The boot chain of the STM32CubeMP13 package running on Arm^® Cortex^®-A7 core is explained in STM32CubeMP13 package - boot architecture.

4. Level 0 (Drivers)[edit | edit source]

This level is divided into three software components:

Hardware Abstraction Layer (HAL)
Low Layer (LL)
Board Support Package (BSP)

4.1. HAL drivers[edit | edit source]

The HAL drivers provide the low level drivers and the hardware interfacing methods to interact with the upper layers (application, libraries and stacks). They provide generic, multi instance and function-oriented APIs which simplify user application implementation by providing ready-to-use processes.

As example, for the communication peripherals (I2C, UART…), they include APIs allowing to initialize and configure the peripheral, to manage data transfer based on polling, interrupt or DMA process, and to handle communication errors that may raise during communication.

Information

Note:

Refer to STM32MP13 reference manuals to get detailed information about all supported internal peripherals of STM32MP13xx family

4.1.1. HAL drivers overview[edit | edit source]

The HAL APIs layer is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without in-depth knowledge about the used STM32 device. This improves the library code reusability and guarantees an easy portability on other devices and STM32 families

Contrary to the low layer drivers (see Low Layer section), the HAL ones are functionality-oriented and not internal peripheral-oriented.
Example: for the Timer peripheral, the APIs could be split into several categories following the functions offered by the internal peripherals (Basic timer, capture, PWM …etc.).

The HAL drivers are a set of common APIs with a high compliancy level with most of the clients available on the market (stacks) called native APIs and embed also some extended functionalities for special services or a combination of several features offered by the STM32 peripherals

The HAL drivers APIs are split in two categories:

Generic APIs which provide common and generic functions to all the STM32 series
Extension APIs which provide specific customized functions for a specific family or a specific part number

4.1.2. List of HAL drivers[edit | edit source]

The list of HAL drivers available for STM32MP13xx family is accessible in HAL drivers.

4.2. LL drivers[edit | edit source]

The Low Layer (LL) drivers offer a fast light-weight expert-oriented layer which is closer to the hardware than the HAL. The LL APIs are available only for a set of peripherals.

4.2.1. LL drivers overview[edit | edit source]

The Low Layer (LL) drivers are part of the STM32CubeMPU firmware HAL that provides basic set of optimized and one-shot services. The Low layer drivers, contrary to the HAL ones are not fully portable across the STM32 families; the availability of some functions depends on the physical availability of the relative features on the product.

The Low Layer (LL) drivers are designed to offer the following features:

New set of inline functions for direct and atomic register access,
One-shot operations that can be used by the HAL drivers or from application level,
Fully independent from HAL and can be used in standalone usage (without HAL drivers),
Full feature coverage of all the supported peripherals.

4.2.2. List of LL drivers[edit | edit source]

The list of LL drivers available for STM32MP13xx family is accessible in LL drivers.

4.3. BSP drivers[edit | edit source]

The BSP drivers are firmware components based on the HAL drivers and provide a set of APIs relative to the hardware components in the discovery boards coming with the STM32Cube Package. All examples and applications given with the STM32Cube are based on these BSP drivers.

4.3.1. BSP drivers overview[edit | edit source]

The BSP architecture proposes a new model that prevents some standard library weaknesses and provides more features:

Portable external resources code (components): the external components could be used by all STM32 families,
Multiple use of hardware resources without duplicated initialization: example: I2C Physical Layer could be used for several DISCO Drivers,
Intuitive functionalities based on high level use case,
Portable BSP drivers for different external devices.

4.3.2. List of BSP drivers[edit | edit source]

The BSP drivers offer a set of APIs relative to the hardware components available in the hardware boards (LEDs, Buttons and COM port). Refer to BSP_drivers

5. Level 1 (Middlewares)[edit | edit source]

Middleware components are a set of libraries providing a set of services. STM32CubeMP13 Package offers main components :

Each middleware component is mainly composed of:

Library core: this is the core of a component; it manages the main library state machine and the data flow between the several modules,
Interface layer: the interface layer is generally used to link the component core with the lower layers like the HAL and the BSP drivers.

5.1. Azure RTOS[edit | edit source]

Azure^® RTOS is a professional grade, highly reliable and market proven middleware suite: With Azure^® RTOS complementing the extensive STM32Cube ecosystem providing free development tools, software bricks, and software Expansion Packages, STM32 users can also leverage the rich services of Azure^® RTOS, which meet the needs of tiny, smart, connected devices. More information relative to general STM32Cube offer can be found on the STMicroelectronics website.

Information

Note:

Refer to Introduction to Azure_RTOS article to get an overview of Azure RTOS

5.2. STM32 USB host library[edit | edit source]

STM32Cube™ USB host library middleware module is part of the STM32Cube firmware package. The USB host library sits on top of the STM32Cube USB host HAL driver. This library offers the APIs used to access USB devices of various classes.

The USB host module can be used for the implementation of the major USB classes:

Mass-storage class (MSC)
Human interface mouse and keyboard class(HID)
Communication device class (CDC)
Audio class (AUDIO)
Media Transfer protocol class (MTP)

In addition to the above-listed classes, the users can build their own class using the available library APIs.

The library is built with the possibility to work in standalone mode or in RTOS mode. The library also supports multi-instance, as it can work simultaneously on two or more USB host peripherals.

For complete information, refer to user manual UM1720 and Release_Notes.html

5.3. STM32 USB Device Library[edit | edit source]

STM32Cube™ USB device library middleware module is part of the STM32CubeMP13 package. The USB device library comes on top of the STM32Cube™ USB device HAL driver and offers all the APIs required to develop a USB device application.

The USB device library is a part of STM32Cube™ package for each STM32 Series. It contains:

The USB low level driver
Commonly used USB class drivers
A set of applications for the most common USB device classes supporting USB Full speed and High speed transfer types (control, interrupt, bulk and isochronous).

For complete information, refer to user manual UM1734 and Release_Notes.html

6. Level 2 (Boards demonstrations)[edit | edit source]

The Boards demonstrations level is composed of a single layer which provides all examples and applications. It includes also all STM32CubeIDE projects for each supported board as well as templates source files.

There are 4 kinds of projects demonstrating different usages of software APIs from level 0 (Drivers) and level 1 (Middleware):

Examples projects showing how to use HAL APIs and Low Layer drivers if any (Level 0) with very basic usage of BSP layer (buttons and LEDs in general)
Applications projects showing how to use the middleware components (Level 1) and how to integrate them with the hardware and BSP/HAL layers (Level 0). These applications could be hybrid and use several other middleware components.
External loader showing how to program the images serially into external memory and boot from external memory.
Templates projects is a really basic user application including STM32CubeIDE projects files, which could be used to start a custom project

Information

Notes:

Refer to STM32CubeMP13 Package structure to get information on locating Examples, Applications and External loader in STM32CubeMP13 Package
Refer to List of projects to get information on the list of available Examples, Applications and External loader in STM32CubeMP13 Package

7. CMSIS[edit | edit source]

The Cortex Microcontroller Software Interface Standard (CMSIS) is a vendor-independent hardware abstraction layer for the Arm^® Cortex^®-A7 processor series.

Refer to CMSIS^[1] to get more information on CMSIS component.

The CMSIS component also provides specific common resources for device support. It enables consistent and simple software interfaces to the processor and the peripherals, simplifying software re-use, reducing the learning curve for microcontroller developers, and reducing the time to market for new devices

This vendor part is called CMSIS Device and it provides interrupt list, peripherals registers description and associated defines for all registers bit fields.

CMSIS structure overview:

├── CMSIS
│   ├── Core
│   │   ├── Include
│   │   └── Template
│   ├── Core_A
│   │   ├── Include
│   │   └── Source
│   ├── Device                  CMSIS Device
│   │   └── ST
│   │   │   └── STM32MP13xx      Common ressources for STM32MP13xx family
│   ├── Documentation
│   │   ├── index.html
│   ├── DSP
│   │   ├── ComputeLibrary
│   │   ├── Examples
│   │   ├── Include
│   │   ├── Platforms
│   │   ├── PrivateInclude
│   │   ├── PythonWrapper
│   │   ├── Scripts
│   │   └── Source
│   │   └── Testing
│   │   └── Toolchain
│   │   └── armac5.cmake
│   │   └── armac6.cmake
│   │   └── cmsisdspconfig.py
│   │   └── config.cmake
│   │   └── configBoot.cmake
│   │   └── configCore.cmake
│   │   └── configLib.cmake
│   │   └── configPlatform.cmake
│   │   └── filterLinkScript.py
│   │   └── gcc.cmake
│   │   └── README.md
│   ├── Include
│   │   ├── cachel1_armv7.h
│   │   ├── cmsis_armcc.h
│   │   ├── cmsis_armclang.h
│   │   ├── cmsis_armclang_ltm.h
│   │   ├── cmsis_compiler.h
│   │   ├── cmsis_gcc.h
│   │   ├── cmsis_iccarm.h
│   │   ├── cmsis_version.h
│   │   ├── core_armv8mbl.h
│   │   ├── core_armv8mml.h
│   │   ├── core_armv81mml.h
│   │   ├── core_cm0.h
│   │   ├── core_cm0plus.h
│   │   ├── core_cm1.h
│   │   ├── core_cm3.h
│   │   ├── core_cm4.h
│   │   ├── core_cm7.h
│   │   ├── core_cm23.h
│   │   ├── core_cm33.h
│   │   ├── core_cm35p.h
│   │   ├── core_cm55.h
│   │   ├── core_sc000.h
│   │   ├── core_sc300.h
│   │   ├── mpu_armv7.h
│   │   ├── mpu_armv8.h
│   │   ├── pmu_armv8.h
│   │   └── tz_context.h
│   ├── NN
│   │   ├── Include
│   │   ├── Scripts
│   │   ├── Source
│   │   ├── .clang-format
│   │   ├── CMakeLists.txt
│   │   ├── README.md
│   ├── RTOS
│   │   └── Template
│   └── RTOS2
│       ├── Include
│       ├── Source
│       └── Template 
│   ├── ARM.CMSIS.pdsc
│   ├── LICENSE.txt
│   ├── README.md

CMSIS Device structure :

├── CMSIS
│   ├── Device                                CMSIS Device
│   │   └── ST
│   │   │   └── |STM32MP13xx                   Common resources for STM32MP13xx family
│   │   │   └── _htmresc
│   │   │   │   └──Include                            Device resources definition
│   │   │   │   │   ├── stm32mp13xx.h
│   │   │   │   │   ├── stm32mp131axx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp131cxx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp131dxx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp131fxx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp133axx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp133cxx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp133dxx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp133fxx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp135axx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp135cxx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp135dxx_ca7.h              --> Added "as example"
│   │   │   │   │   ├── stm32mp135fxx_ca7.h              
│   │   │   │   │   ├── system_stm32mp13xx_A7.h
│   │   │   │   └── Source
│   │   │   │   │   │   └──  gcc                                 linker files and startup files (memory mapping)
│   │   │   │   │   │   │   └── linker
│   │   │   │   │   │   │   │   ├── stm32mp13xx_a7_ddr.ld
│   │   │   │   │   │   │   │   ├── stm32mp13xx_a7_sysram.ld
│   │   │   │   │   │   │   ├── startup_stm32mp131axx_ca7.c           --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp131axx_ca7_azurertos.c       --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp131cxx_ca7.c                        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp131cxx_ca7_azurertos.c       --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp131dxx_ca7.c                        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp131dxx_ca7_azurertos.c       --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp131fxx_ca7.c                         --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp131fxx_ca7_azurertos.c        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp133axx_ca7.c                        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp133axx_ca7_azurertos.c       --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp133cxx_ca7.c                        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp133cxx_ca7_azurertos.c       --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp133dxx_ca7.c                        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp133dxx_ca7_azurertos.c       --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp133fxx_ca7.c                         --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp133fxx_ca7_azurertos.c        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp135axx_ca7.c                        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp135axx_ca7_azurertos.c       --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp135cxx_ca7.c                        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp135cxx_ca7_azurertos.c       --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp135dxx_ca7.c                        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp135dxx_ca7_azurertos.c       --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp135fxx_ca7.c                         --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp135fxx_ca7_azurertos.c        --> Added "as example"
│   │   │   │   │   │   │   ├── startup_stm32mp135c_ca7.c                            
│   │   │   │   │   │   │   ├── startup_stm32mp135c_ca7_azurertos.c           
│   │   │   │   │   │   ├── mmu_stm32mp13xx_A7.c
│   │   │   │   │   │   ├── system_stm32mp13xx_A7.c
│   │   │   │   │   │   ├──system_stm32mp13xx_A7_azurertos.c
│   │   │   │   ├── LICENSE.md
│   │   │   │   ├── LICENSE.txt
│   │   │   │   ├── Release_Notes.html

Information

Notes:

Several CMSIS devices are provided for a same family (ex: stm32mp131axx_ca7.h & stm32mp133cxx_ca7.h are provided for stm32mp13 family). It is done to fit exactly the resources present in the STM32 Part Number (ex: STM32MP13xA does not include CRYP peripheral).

Usage of the right CMSIS device is done thanks to a preprocessor switch in STM32CubeIDE project settings (ex: STM32MP135Axx, or STM32MP135Cxx, or STM32MP135Dxx, or STM32MP135Fxx)

8. References[edit | edit source]

↑ CMSIS

[1] CMSIS

[1]