1. Article purpose
The purpose of this article is to:
- briefly introduce the OCTOSPI peripheral and its main features,
- indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
- list the software frameworks and drivers managing the peripheral,
- explain how to configure the peripheral.
2. Peripheral overview
The OCTOSPI peripheral interfaces the processor with serial NOR, serial NAND and HyperFlash flash memories.
It supports:
- Single, Dual-, Quad- or Octal-SPI flash memories
- HyperFlash memories
- Dual data rate
- Memory-mapped modes for read access.
Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
3. Peripheral usage
This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor(s), and the STM32CubeMPU Package running on the Arm® Cortex®-M processor.
3.1. Boot time assignment
3.1.1. On STM32MP21x lines 
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| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (ROM code) |
Cortex-A35 secure (TF-A BL2) |
Cortex-A35 nonsecure (U-Boot) | |||
| Mass storage | OCTOSPI | OCTOSPI1 | ☐ | ☐ | ☐ | |
3.1.2. On STM32MP23x lines
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| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (ROM code) |
Cortex-A35 secure (TF-A BL2) |
Cortex-A35 nonsecure (U-Boot) | |||
| Mass storage | OCTOSPI | OCTOSPI1 | ☐ | ☐ | ☐ | |
| OCTOSPI2 | ☐ | ☐ | ||||
3.1.3. On STM32MP25x lines
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| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (ROM code) |
Cortex-A35 secure (TF-A BL2) |
Cortex-A35 nonsecure (U-Boot) | |||
| Mass storage | OCTOSPI | OCTOSPI1 | ☐ | ☐ | ☐ | |
| OCTOSPI2 | ☐ | ☐ | ||||
3.2. Runtime assignment
3.2.1. On STM32MP21x lines
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| Domain | Peripheral | Runtime allocation | Comment
| ||||
|---|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 nonsecure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 nonsecure (STM32Cube) | |||
| Mass storage | OCTOSPI | OCTOSPI1 | ⬚OP-TEE | ☐ | ☐ | ☐ | |
3.2.2. On STM32MP23x lines
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| Domain | Peripheral | Runtime allocation | Comment
| ||||
|---|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 nonsecure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 nonsecure (STM32Cube) | |||
| Mass storage | OCTOSPI | OCTOSPI1 | ⬚OP-TEE | ☐ | ☐ | ☐ | OP-TEE need to access OCTOSPI1 at boot time to set OSPIM mode |
| OCTOSPI2 | ⬚OP-TEE | ☐ | ☐ | ☐ | OP-TEE need to access OCTOSPI2 at boot time to set OSPIM mode | ||
3.2.3. On STM32MP25x lines
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| Domain | Peripheral | Runtime allocation | Comment
| |||||
|---|---|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 nonsecure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 nonsecure (STM32Cube) |
Cortex-M0+ (STM32Cube) | |||
| Mass storage | OCTOSPI | OCTOSPI1 | ⬚OP-TEE | ☐ | ☐ | ☐ | OP-TEE need to access OCTOSPI1 at boot time to set OSPIM mode | |
| OCTOSPI2 | ⬚OP-TEE | ☐ | ☐ | ☐ | OP-TEE need to access OCTOSPI2 at boot time to set OSPIM mode | |||
4. Software frameworks and drivers
Below are listed the software frameworks and drivers managing the OCTOSPI peripheral for the embedded software components listed in the above tables.
- Linux®: MTD framework and drivers (drivers/spi/spi-stm32-ospi.c , drivers/mtd/hyperbus/hyperbus-stm32.c , drivers/memory/stm32-omi.c )
- STM32Cube: header file of OCTOSPI HAL module
- TF-A BL2: MTD frameworks (drivers/mtd/ ) and driver (drivers/st/spi/stm32_ospi.c )
- U-Boot: MTD frameworks (drivers/mtd/ ) and drivers (drivers/spi/stm32_ospi.c , drivers/mtd/stm32_hyperbus.c , drivers/memory/stm32-omi.c )
5. How to assign and configure the peripheral
The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral by generating:
- partial device trees (pin control and clock tree) for the OpenSTLinux software components,
- HAL initialization code for the STM32CubeMPU Package.
The configuration is applied by the firmware running in the context in which the peripheral is assigned.
For Linux kernel configuration, refer to OCTOSPI device tree configuration.
6. References