1. Article purpose
The purpose of this article is to:
- briefly introduce the DCMIPP peripheral and its main features,
- indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
- list the software frameworks and drivers managing the peripheral,
- explain how to configure the peripheral.
2. Peripheral overview
The DCMIPP (digital camera memory interface pixel processor) peripheral is used to receive video data from an external camera sensor device, or from any other digital video equipment supporting its interfaces.
2.1. On STM32MP13x lines 
The DCMIPP peripheral main features are:
- Parallel input interface: up to 16 bits in parallel
- Pipe0 (for data dump): for a direct dump from the camera to the memory without processing
- Input pixel format: RGB565, RGB888, YUV422, raw Bayer/Mono 8/10/12/14, and ByteStream (JPEG)
- Output pixel format: any data as-is, Y/Rb: 8/10/12/14 statistics, bit streams
- Flow selection and frame control: Capture mode in Continuous vs. Snapshot mode
- Crop and basic decimation
Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
2.2. On STM32MP23x lines
and STM32MP25x lines 
The DCMIPP peripheral main features are the same as on STM32MP13x lines , with the following extra ones:
- CSI-2 host input interface: MIPI CSI-2 v1.3, Interleaved packets, four virtual channels. Please refer to CSI internal peripheral for more details
- Flow selection and frame control: CSI-2 interleaved packets supported, Capture mode in Continuous vs. Snapshot mode
- Pipe1 (for main usage): with ISP, crop, downsize, ColorConv, decimation, multi-planar
- Statistic removal
- Bad pixel removal
- Integrated image processing block (ISP), which makes possible to connect very low cost camera modules without any embedded ISP: Black level calibration, Statistics extraction, Exposure control, Raw Bayer to RGB conversion (demosaicing), Color conversion to adapt to the sensor and tune the illumination, Contrast enhancement
- Byte-to-pixel conversion
- Output pixel format: 888, 565, 422-1, Y8, ARGB and RGBA (coplanar) and 422-2 / 420-2 / 420-3 (multi-planar)
- Pipe2 (for ancillary usage): with crop, downsize, decimation, coplanar
- Byte-to-pixel conversion
- Output pixel format: 888, 565, 422-1, Y8, ARGB and RGBA (coplanar only)
- Test pattern generator: Color bar or square pattern, up to 16k x 16k, YUV, raw, or Mono
Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
2.3. On STM32MP21x lines 
The DCMIPP peripheral main features are the same as on STM32MP23x lines and STM32MP25x lines
, with the following extra ones:
- Pipe1 (for main usage)
- Integrated image processing block (ISP): Statistics extraction supports the histogram extraction
Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
3. Peripheral usage
This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor(s), and the STM32CubeMPU Package running on the Arm® Cortex®-M processor.
3.1. Boot time assignment
3.1.1. On STM32MP1 series
The DCMIPP peripheral is not used at boot time.
3.1.2. On STM32MP2 series
Click on to expand or collapse the legend...
Domain | Peripheral | Boot time allocation | Comment ![]() | |||
---|---|---|---|---|---|---|
Instance | Cortex-A35 secure (ROM code) |
Cortex-A35 secure (TF-A BL2) |
Cortex-A35 nonsecure (U-Boot) | |||
Visual | DCMIPP | DCMIPP | ⬚ |
3.2. Runtime assignment
3.2.1. On STM32MP13x lines 
Click on to expand or collapse the legend...
Domain | Peripheral | Runtime allocation | Comment ![]() | ||
---|---|---|---|---|---|
Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) | |||
Visual | DCMIPP | DCMIPP | ☑ |
3.2.2. On STM32MP21x lines 
Click on to expand or collapse the legend...
Domain | Peripheral | Runtime allocation | Comment ![]() | ||||
---|---|---|---|---|---|---|---|
Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 nonsecure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 nonsecure (STM32Cube) | |||
Visual | DCMIPP | DCMIPP | ⬚OP-TEE | ☑ | ⬚ | ☐ |
3.2.3. On STM32MP23x lines 
Click on to expand or collapse the legend...
Domain | Peripheral | Runtime allocation | Comment ![]() | ||||
---|---|---|---|---|---|---|---|
Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 nonsecure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 nonsecure (STM32Cube) | |||
Visual | DCMIPP | DCMIPP | ⬚OP-TEE | ☑ | ⬚ | ☐ |
3.2.4. On STM32MP25x lines 
Click on to expand or collapse the legend...
Domain | Peripheral | Runtime allocation | Comment ![]() | |||||
---|---|---|---|---|---|---|---|---|
Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 nonsecure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 nonsecure (STM32Cube) |
Cortex-M0+ (STM32Cube) | |||
Visual | DCMIPP | DCMIPP | ⬚OP-TEE | ☑ | ⬚ | ☐ |
4. Software frameworks and drivers
Below are listed the software frameworks and drivers managing the DCMIPP peripheral for the embedded software components listed in the above tables.
- Linux®: V4L2 framework
- STM32Cube:
- for STM32MP13x lines
: DCMIPP HAL driver and header file of DCMIPP HAL module
- for STM32MP2 series: DCMIPP HAL driver and header file of DCMIPP HAL module
- for STM32MP13x lines
5. How to assign and configure the peripheral
The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral:
- partial device trees (pin control and clock tree) generation for the OpenSTLinux software components,
- HAL initialization code generation for the STM32CubeMPU Package.
The configuration is applied by the firmware running in the context in which the peripheral is assigned.
See also additional information in the DCMIPP device tree configuration article for Linux®.