Have you ever needed a microprocessor that can run a Linux application with a Full-HD display, while also handling isolated real-time tasks?
Do you need industrial interfaces? What if it could also embed state of the art security solutions?
And what if it could remain cold while running, so you don't care about cooling it?
The STM32MP23, built around a heterogenous architecture embedding an Arm® Cortex®-A35 dual core and an Arm® Cortex®-M33 coprocessor, may be your solution!
This article introduces the STM32MP23x lines 
, and gives information about the part number codification and block diagram. Then technical aspects are introduced, providing information on:
- STM32MP23 documentation,
- articles dedicated to internal peripherals that make the transition towards the software frameworks required to control these peripherals,
- the board supporting STM32MP23 microprocessors,
- the supported software distributions, that can be downloaded into the STM32MP23 microprocessors.
1. Introduction[edit | edit source]
STM32MP23 microprocessors are targeting industry 4.0 (with rich connectivity), human-machine interfaces (up to 1080p60), artificial Intelligence at the edge (up to 0.6 TOPS NPU) and a wide range of smart products that require a very high level of security, such as IoT and payment applications.
STM32MP23 microprocessors are based on a heterogenous architecture embedding an Arm® Cortex®-A35 dual core and an Arm® Cortex®-M33 coprocessor, both supporting Arm®Trustzone® mode for secure operations.
This microprocessor embeds graphics (GPU), video (VPU), and artificial intelligence (NPU) hardware accelerators to offload the Cortex cores with enhanced performance and power efficiency.
On top of this, it relies on the connectivity foundations from the STM32MP2 series with dual Gigabit ETH (with TSN end-point support) and LVDS display interfaces (on top of DSI and RGB), that enlarge the possibilities in industrial, smart city and smart home applications.
The STM2MP23 also comes with a resource isolation framework (RIF) that is a very flexible and powerful infrastructure allowing to decide which Arm® Cortex® will boot first and to associate each peripheral to a hardware execution context or traffic initiator (like a DMA).
2. Part number codification[edit | edit source]
The figure below shows the differences between the three STM32MP23x lines, with their security and frequency options. Each line can be delivered in one of three packages represented on the right side: refer to the technical documentation to get details on the available features per package.
The tables below explains how the part numbers are encoded for all the above combinations.
2.1. STM32MP23x lines[edit | edit source]
Cortex-A35 Cortex-M33 GPU/NPU Video dec.[1] Display FDCAN Gigabit Ethernet interfaces STM32MP235 Dual Yes Yes Yes TFT/DSI/LVDS 2 2 STM32MP233 Dual Yes No No TFT 2 2 STM32MP231 Single Yes No No TFT No 1
2.2. Security, Cortex-A35 frequency and GPU/NPU frequency[edit | edit source]
Security Cortex-A35 frequency GPU/NPU frequency[2] STM32MP23xA Basic 1200 MHz[3] 400 MHz STM32MP23xC Secure boot + Cryptography 1200 MHz[3] 400 MHz STM32MP23xD Basic 1500 MHz[3] 400 MHz STM32MP23xF Secure boot + Cryptography 1500 MHz[3] 400 MHz
2.3. Packages[edit | edit source]
STM32MP23xxAJ TFBGA361, 16x16mm, pitch 0.8mm 144 GPIOs STM32MP23xxAK VFBGA424, 14x14mm, pitch 0.5mm 144 GPIOs STM32MP23xxAL VFBGA361, 10x10mm, pitch 0.5mm 144 GPIOs
2.4. Junction temperature[edit | edit source]
STM32MP23xxxx3 - 40 to + 125 °C
3. Block diagram[edit | edit source]
Here below is the STM32MP235F block diagram offering the richest features set of the STM32MP23 microprocessor.
The above figure shows a functional view of the design that does not aim to be aligned with the real design: it shows the available features and not how they are implemented into the microprocessor.
4. Technical documentation[edit | edit source]
- STM32MP23 reference manuals: device and internal peripheral user specifications
- STM32MP23 datasheets: electrical characteristics, package, and pinout descriptions
5. Internal peripherals[edit | edit source]
STM32MP23 peripherals overview article gives a description of all the internal peripherals available on STM32MP23 devices, with direct links to the articles where you can find:
- an overview of each peripheral,
- the list of instances available for each peripheral type,
- information on the way each instance can be shared between Arm® Cortex®-A35 and Cortex®-M33 cores,
- direct links to the software frameworks used to control the peripheral from different Arm® cores and security modes such as Cortex®-A35 non secure, Cortex®-A35 secure, Cortex®-M33 non secure, or Cortex®-M33 secure.
6. How to get further with STM32MP23 ecosystem[edit | edit source]
6.1. Boards[edit | edit source]
6.2. Supported software distributions[edit | edit source]
The embedded software distributions supported for the boards used to get started with STM32MP23 devices can be found in the following article:
7. References and foot notes[edit | edit source]
- ↑ Video codecs: H.264/VP8 up 1920×1080 @60 fps
- ↑ Only for STM32MP235x
- ↑ 3.0 3.1 3.2 3.3 Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 qualification standard. Refer to the STM32MP23 datasheets and AN5729 for further information.
Arm® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere. 
Arm® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.