DCMIPP device tree configuration

Applicable for

STM32MP13x lines, STM32MP21x lines, STM32MP23x lines, STM32MP25x lines

1. Article purpose[edit | edit source]

This article explains how to configure the DCMIPP internal peripheral when assigned to the Linux^® OS. In that case, it is controlled by the V4L2 camera framework.

The configuration is performed using the device tree mechanism that provides a hardware description of the DCMIPP peripheral, used by the STM32 DCMIPP Linux driver or by the V4L2 camera framework.

If the peripheral is assigned to another execution context, refer to How to assign an internal peripheral to an execution context article for guidelines on peripheral assignment and configuration.

2. DT bindings documentation[edit | edit source]

The DCMIPP internal peripheral is documented through the STM32 DCMIPP device tree bindings file Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml ^[1].

3. DT configuration[edit | edit source]

This hardware description is a combination of the STM32 microprocessor device tree files (.dtsi extension) and board device tree files (.dts extension). See the device tree article for an explanation of the device tree file split.

STM32CubeMX can be used to generate the board device tree. Refer to How to configure the DT using STM32CubeMX for more details.

3.1. DT configuration (STM32/SoC level)[edit | edit source]

The DCMIPP node is located in the device tree file for the software components, supporting the peripheral and listed in the above DT bindings documentation paragraph.

The DCMIPP device tree node is declared in:

arch/arm/boot/dts/st/stm32mp135.dtsi on STM32MP13x lines

	soc {
...
&etzpc {
	dcmipp: dcmipp@5a000000 {
		compatible = "st,stm32mp13-dcmipp";
		reg = <0x5a000000 0x400>;
		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
		resets = <&rcc DCMIPP_R>;
		clocks = <&rcc DCMIPP_K>;
		clock-names = "kclk";
		access-controllers = <&etzpc 4>;
		status = "disabled";
	};
...

arch/arm64/boot/dts/st/stm32mp211.dtsi on STM32MP21x lines

...
	soc1: soc@1 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		interrupt-parent = <&intc>;
		ranges = <0x0 0x0 0x0 0x80000000>;

		dcmipp: dcmipp@48030000 {
			compatible = "st,stm32mp25-dcmipp";
			reg = <0x48030000 0x1000>;
			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
			resets = <&rcc DCMIPP_R>;
			clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>;
			clock-names = "kclk", "mclk";
			access-controllers = <&rifsc 87>;
			status = "disabled";
		};
...

arch/arm64/boot/dts/st/stm32mp231.dtsi on STM32MP23x lines

...
	soc@0 {
...
			dcmipp: dcmipp@48030000 {
				compatible = "st,stm32mp25-dcmipp";
				reg = <0x48030000 0x1000>;
				interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
				resets = <&rcc DCMIPP_R>;
				clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>;
				clock-names = "kclk", "mclk";
				access-controllers = <&rifsc 87>;
				power-domains = <&CLUSTER_PD>;
				status = "disabled";
			};
...

arch/arm64/boot/dts/st/stm32mp251.dtsi on STM32MP25x lines

	soc@0 {
...
			dcmipp: dcmipp@48030000 {
				compatible = "st,stm32mp25-dcmipp";
				reg = <0x48030000 0x1000>;
				interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
				resets = <&rcc DCMIPP_R>;
				clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>;
				clock-names = "kclk", "mclk";
				access-controllers = <&rifsc 87>;
				power-domains = <&CLUSTER_PD>;
				status = "disabled";
			};
...

Warning

This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.

When using a different sensor camera device, only the sensor-related configuration part must be adapted in the associated board device tree file (see #DT configuration (board level)).

Refer to stm32-dcmipp bindings^[1] for more details.

3.2. DT configuration (board level)[edit | edit source]

3.2.1. For STM32MP13x lines [edit | edit source]

&dcmipp {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&dcmipp_pins_a>;
	pinctrl-1 = <&dcmipp_sleep_pins_a>;
	port {
		dcmipp_0: endpoint {
			remote-endpoint = <&mipid02_2>;
			bus-width = <8>;
			hsync-active = <0>;
			vsync-active = <0>;
			pclk-sample = <0>;
			pclk-max-frequency = <120000000>;
		};
	};
};
...

&i2c5 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c5_pins_a>;
	pinctrl-1 = <&i2c5_sleep_pins_a>;
	i2c-scl-rising-time-ns = <170>;
	i2c-scl-falling-time-ns = <5>;
	clock-frequency = <400000>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;

	stmipi: stmipi@14 {
		compatible = "st,st-mipid02";
		reg = <0x14>;
		status = "okay";
		clocks = <&clk_mco1>;
		clock-names = "xclk";
		VDDE-supply = <&scmi_v1v8_periph>;
		VDDIN-supply = <&scmi_v1v8_periph>;
		reset-gpios = <&mcp23017 2 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			port@0 {
				reg = <0>;

				mipid02_0: endpoint {
					data-lanes = <1 2>;
					lane-polarities = <0 0 0>;
					remote-endpoint = <&gc2145_ep>;
				};
			};
			port@2 {
				reg = <2>;

				mipid02_2: endpoint {
					bus-width = <8>;
					hsync-active = <0>;
					vsync-active = <0>;
					pclk-sample = <0>;
					remote-endpoint = <&dcmipp_0>;
				};
			};
		};
	};

	gc2145: gc2145@3c {
		compatible = "galaxycore,gc2145";
		reg = <0x3c>;
		clocks = <&clk_ext_camera>;
		iovdd-supply = <&scmi_v3v3_sw>;
		avdd-supply = <&scmi_v3v3_sw>;
		dvdd-supply = <&scmi_v3v3_sw>;
		powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		status = "okay";

		port {
			gc2145_ep: endpoint {
				remote-endpoint = <&mipid02_0>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
				link-frequencies = /bits/ 64 <120000000 192000000 240000000>;
			};
		};
	};

	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		reg = <0x3c>;
		clocks = <&clk_ext_camera>;
		clock-names = "xclk";
		DOVDD-supply = <&scmi_v3v3_sw>;
		status = "disabled";
		powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;

		port {
			ov5640_0: endpoint {
				/*remote-endpoint = <&mipid02_0>;*/
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};
...

This section, part of the STM32MP135x-DK Discovery kit device tree file arch/arm/boot/dts/st/stm32mp135f-dk.dts ^[2], shows how is configured the DCMIPP hardware block to interconnect with a serial CSI-2 camera sensor through the ST-Microelectronics MIPID02 CSI-2 to parallel bridge. The configurable settings are the following:

Camera sensor endpoint:
- GalaxyCore GC2145 node with "okay" for "status":
  - The GalaxyCore GC2145 model^[3].
  - Number of CSI-2 data lanes: 1 or 2
  - Lanes polarity: active low (0) or active high (1)
- Omnivision OV5640 node with "okay" for "disabled":
  - The Omnivision OV5640 model^[4].
  - Number of CSI-2 data lanes: 1 or 2
  - Lanes polarity: active low (0) or active high (1)

This section also defines what is the DCMIPP pins multiplexing used for this board (<&dcmipp_pins_a>, <&dcmipp_sleep_pins_a>), exact pins details being defined in the STM32MP135x-DK Discovery kit pinctrl device tree file arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi ^[5]:

&pinctrl {
...
	dcmipp_pins_a: dcmi-0 {
		pins1 {
			pinmux = <STM32_PINMUX('H',  8,  AF13)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G',  9,  AF13)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('B',  7,  AF14)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('A',  9,  AF13)>,/* DCMI_D0 */
				 <STM32_PINMUX('D',  0,  AF13)>,/* DCMI_D1 */
				 <STM32_PINMUX('G', 10,  AF13)>,/* DCMI_D2 */
				 <STM32_PINMUX('E',  4,  AF13)>,/* DCMI_D3 */
				 <STM32_PINMUX('D', 11,  AF14)>,/* DCMI_D4 */
				 <STM32_PINMUX('D',  3,  AF13)>,/* DCMI_D5 */
				 <STM32_PINMUX('B',  8,  AF13)>,/* DCMI_D6 */
				 <STM32_PINMUX('E', 14,  AF13)>;/* DCMI_D7 */
			bias-disable;
		};
	};

	dcmipp_sleep_pins_a: dcmi-sleep-0 {
		pins1 {
			pinmux = <STM32_PINMUX('H',  8,  ANALOG)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G',  9,  ANALOG)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('B',  7,  ANALOG)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('A',  9,  ANALOG)>,/* DCMI_D0 */
				 <STM32_PINMUX('D',  0,  ANALOG)>,/* DCMI_D1 */
				 <STM32_PINMUX('G', 10,  ANALOG)>,/* DCMI_D2 */
				 <STM32_PINMUX('E',  4,  ANALOG)>,/* DCMI_D3 */
				 <STM32_PINMUX('D', 11,  ANALOG)>,/* DCMI_D4 */
				 <STM32_PINMUX('D',  3,  ANALOG)>,/* DCMI_D5 */
				 <STM32_PINMUX('B',  8,  ANALOG)>,/* DCMI_D6 */
				 <STM32_PINMUX('E', 14,  ANALOG)>;/* DCMI_D7 */
		};
	};
...

An alternate pin multiplexing could be defined (for example to fit a new board design) by modifying the STM32MP135x-DK Discovery kit pinctrl device tree file^[5] following the possible pins assignment defined in the MPU datasheet^[6].

3.2.2. For STM32MP2 series[edit | edit source]

3.2.2.1. For MIPI CSI serial interface camera sensor[edit | edit source]

For STM32MP25x lines , a full example of the STM32MP257 Evaluation board device tree is available in arch/arm64/boot/dts/st/stm32mp257f-ev1.dts . We can found:

the DCMIPP configuration (remote-endpoint, bus-type), connected to the CSI internal peripheral
the CSI configuration (remote-endpoint, bus-type, data-lanes), connected to the DCMIPP internal peripheral and to the imx335 camera sensor
the imx335 camera sensor configuration (remote-endpoint, clock-lanes, data-lanes, link-frequencies), connected to CSI internal peripheral and driven by the I2C internal peripheral

...
&csi {
	vdd-supply =  <&scmi_vddcore>;
	vdda18-supply = <&scmi_v1v8>;
	status = "okay";
	ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			csi_sink: endpoint {
				remote-endpoint = <&imx335_ep>;
				data-lanes = <0 1>;
				bus-type = <4>;
			};
		};
		port@1 {
			reg = <1>;
			csi_source: endpoint {
				remote-endpoint = <&dcmipp_0>;
			};
		};
	};
};

&dcmipp {
	status = "okay";
	port {
		dcmipp_0: endpoint {
			remote-endpoint = <&csi_source>;
			bus-type = <4>;
		};
	};
};

...
&i2c2 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c2_pins_a>;
	pinctrl-1 = <&i2c2_sleep_pins_a>;
	i2c-scl-rising-time-ns = <100>;
	i2c-scl-falling-time-ns = <13>;
	clock-frequency = <400000>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;

	imx335: imx335@1a {
		compatible = "sony,imx335";
		reg = <0x1a>;
		clocks = <&clk_ext_camera>;
		avdd-supply = <&imx335_2v9>;
		ovdd-supply = <&imx335_1v8>;
		dvdd-supply = <&imx335_1v2>;
		reset-gpios = <&gpioi 7 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>;
		powerdown-gpios = <&gpioi 0 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>;
		status = "okay";

		port {
			imx335_ep: endpoint {
				remote-endpoint = <&csi_sink>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
				link-frequencies = /bits/ 64 <594000000>;
			};
		};
	};
...

The following board device trees can be used as examples to:

STM32MP257F-DK Discovery kit : arch/arm64/boot/dts/st/stm32mp257f-dk.dts

3.2.2.2. For parallel interface camera sensor[edit | edit source]

Information

The camera sensor parallel interface is not available on official STM32MP2 boards because the MIPI CSI interface is preferred. However, a full board device tree example is described in the chapter DT configuration examples.

The DCMIPP camera sensor parallel interface pins multiplexing is shared with the DCMI one and declared in:

arch/arm64/boot/dts/st/stm32mp23-pinctrl.dtsi on STM32MP23x lines

...
&pinctrl {
...
	dcmi_test_pins_a: dcmi-test-0 {
		pin_pixclk {
			pinmux = <STM32_PINMUX('G', 5,  AF14)>;/* DCMI_PIXCLK */
			bias-disable;
		};
		pins_sync_data {
			pinmux = <STM32_PINMUX('G', 6,  AF14)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G', 7,  AF14)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('F', 12, AF14)>,/* DCMI_D0 */
				 <STM32_PINMUX('I', 5,  AF14)>,/* DCMI_D1 */
				 <STM32_PINMUX('G', 8,  AF14)>,/* DCMI_D2 */
				 <STM32_PINMUX('G', 9,  AF14)>,/* DCMI_D3 */
				 <STM32_PINMUX('G', 10, AF14)>,/* DCMI_D4 */
				 <STM32_PINMUX('G', 11, AF14)>,/* DCMI_D5 */
				 <STM32_PINMUX('G', 12, AF14)>,/* DCMI_D6 */
				 <STM32_PINMUX('G', 13, AF14)>;/* DCMI_D7 */
			bias-disable;
			st,io-retime = <1>;
			st,io-clk-type = <1>;
		};
	};

	dcmi_sleep_test_pins_a: dcmi-sleep-test-0 {
		pins {
			pinmux = <STM32_PINMUX('G', 6,  ANALOG)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G', 7,  ANALOG)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('G', 5,  ANALOG)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('F', 12, ANALOG)>,/* DCMI_D0 */
				 <STM32_PINMUX('I', 5,  ANALOG)>,/* DCMI_D1 */
				 <STM32_PINMUX('G', 8,  ANALOG)>,/* DCMI_D2 */
				 <STM32_PINMUX('G', 9,  ANALOG)>,/* DCMI_D3 */
				 <STM32_PINMUX('G', 10, ANALOG)>,/* DCMI_D4 */
				 <STM32_PINMUX('G', 11, ANALOG)>,/* DCMI_D5 */
				 <STM32_PINMUX('G', 12, ANALOG)>,/* DCMI_D6 */
				 <STM32_PINMUX('G', 13, ANALOG)>;/* DCMI_D7 */
		};
	};

	dcmi_test_pins_b: dcmi-test-1 {
		pin_pixclk {
			pinmux = <STM32_PINMUX('G', 3,  AF14)>;/* DCMI_PIXCLK */
			bias-disable;
			slew-rate = <3>;
		};
		pins_sync_data {
			pinmux = <STM32_PINMUX('F', 3,  AF14)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G', 4,  AF14)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('D', 15, AF13)>,/* DCMI_D0 */
				 <STM32_PINMUX('D', 14,  AF13)>,/* DCMI_D1 */
				 <STM32_PINMUX('K', 7,  AF13)>,/* DCMI_D2 */
				 <STM32_PINMUX('K', 3,  AF13)>,/* DCMI_D3 */
				 <STM32_PINMUX('I', 14, AF13)>,/* DCMI_D4 */
				 <STM32_PINMUX('K', 6, AF13)>,/* DCMI_D5 */
				 <STM32_PINMUX('K', 2, AF13)>,/* DCMI_D6 */
				 <STM32_PINMUX('J', 6, AF13)>;/* DCMI_D7 */
			bias-disable;
			st,io-retime = <1>;
			slew-rate = <3>;
		};
	};

	dcmi_sleep_test_pins_b: dcmi-sleep-test-1 {
		pins {
			pinmux = <STM32_PINMUX('F', 3,  ANALOG)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G', 4,  ANALOG)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('G', 3,  ANALOG)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('D', 15, ANALOG)>,/* DCMI_D0 */
				 <STM32_PINMUX('D', 14,  ANALOG)>,/* DCMI_D1 */
				 <STM32_PINMUX('K', 7,  ANALOG)>,/* DCMI_D2 */
				 <STM32_PINMUX('K', 3,  ANALOG)>,/* DCMI_D3 */
				 <STM32_PINMUX('I', 14, ANALOG)>,/* DCMI_D4 */
				 <STM32_PINMUX('K', 6, ANALOG)>,/* DCMI_D5 */
				 <STM32_PINMUX('K', 2, ANALOG)>,/* DCMI_D6 */
				 <STM32_PINMUX('J', 6, ANALOG)>;/* DCMI_D7 */
		};
	};
...

arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi on STM32MP25x lines

...
&pinctrl {
...
	dcmi_test_pins_a: dcmi-test-0 {
		pin_pixclk {
			pinmux = <STM32_PINMUX('G', 5,  AF14)>;/* DCMI_PIXCLK */
			bias-disable;
		};
		pins_sync_data {
			pinmux = <STM32_PINMUX('G', 6,  AF14)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G', 7,  AF14)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('F', 12, AF14)>,/* DCMI_D0 */
				 <STM32_PINMUX('I', 5,  AF14)>,/* DCMI_D1 */
				 <STM32_PINMUX('G', 8,  AF14)>,/* DCMI_D2 */
				 <STM32_PINMUX('G', 9,  AF14)>,/* DCMI_D3 */
				 <STM32_PINMUX('G', 10, AF14)>,/* DCMI_D4 */
				 <STM32_PINMUX('G', 11, AF14)>,/* DCMI_D5 */
				 <STM32_PINMUX('G', 12, AF14)>,/* DCMI_D6 */
				 <STM32_PINMUX('G', 13, AF14)>;/* DCMI_D7 */
			bias-disable;
			st,io-retime = <1>;
			st,io-clk-type = <1>;
		};
	};

	dcmi_sleep_test_pins_a: dcmi-sleep-test-0 {
		pins {
			pinmux = <STM32_PINMUX('G', 6,  ANALOG)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G', 7,  ANALOG)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('G', 5,  ANALOG)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('F', 12, ANALOG)>,/* DCMI_D0 */
				 <STM32_PINMUX('I', 5,  ANALOG)>,/* DCMI_D1 */
				 <STM32_PINMUX('G', 8,  ANALOG)>,/* DCMI_D2 */
				 <STM32_PINMUX('G', 9,  ANALOG)>,/* DCMI_D3 */
				 <STM32_PINMUX('G', 10, ANALOG)>,/* DCMI_D4 */
				 <STM32_PINMUX('G', 11, ANALOG)>,/* DCMI_D5 */
				 <STM32_PINMUX('G', 12, ANALOG)>,/* DCMI_D6 */
				 <STM32_PINMUX('G', 13, ANALOG)>;/* DCMI_D7 */
		};
	};

	dcmi_test_pins_b: dcmi-test-1 {
		pin_pixclk {
			pinmux = <STM32_PINMUX('G', 3,  AF14)>;/* DCMI_PIXCLK */
			bias-disable;
			slew-rate = <3>;
		};
		pins_sync_data {
			pinmux = <STM32_PINMUX('F', 3,  AF14)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G', 4,  AF14)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('D', 15, AF13)>,/* DCMI_D0 */
				 <STM32_PINMUX('D', 14,  AF13)>,/* DCMI_D1 */
				 <STM32_PINMUX('K', 7,  AF13)>,/* DCMI_D2 */
				 <STM32_PINMUX('K', 3,  AF13)>,/* DCMI_D3 */
				 <STM32_PINMUX('I', 14, AF13)>,/* DCMI_D4 */
				 <STM32_PINMUX('K', 6, AF13)>,/* DCMI_D5 */
				 <STM32_PINMUX('K', 2, AF13)>,/* DCMI_D6 */
				 <STM32_PINMUX('J', 6, AF13)>;/* DCMI_D7 */
			bias-disable;
			st,io-retime = <1>;
			slew-rate = <3>;
		};
	};

	dcmi_sleep_test_pins_b: dcmi-sleep-test-1 {
		pins {
			pinmux = <STM32_PINMUX('F', 3,  ANALOG)>,/* DCMI_HSYNC */
				 <STM32_PINMUX('G', 4,  ANALOG)>,/* DCMI_VSYNC */
				 <STM32_PINMUX('G', 3,  ANALOG)>,/* DCMI_PIXCLK */
				 <STM32_PINMUX('D', 15, ANALOG)>,/* DCMI_D0 */
				 <STM32_PINMUX('D', 14,  ANALOG)>,/* DCMI_D1 */
				 <STM32_PINMUX('K', 7,  ANALOG)>,/* DCMI_D2 */
				 <STM32_PINMUX('K', 3,  ANALOG)>,/* DCMI_D3 */
				 <STM32_PINMUX('I', 14, ANALOG)>,/* DCMI_D4 */
				 <STM32_PINMUX('K', 6, ANALOG)>,/* DCMI_D5 */
				 <STM32_PINMUX('K', 2, ANALOG)>,/* DCMI_D6 */
				 <STM32_PINMUX('J', 6, ANALOG)>;/* DCMI_D7 */
		};
	};
...

An alternate pin multiplexing could be defined (for example to fit a new board design) by using the Linux kernel STM32MP25 pinctrl device tree file arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi ^[7] following the possible pins assignment defined in the MPU reference manual^[8].

STM32CubeMX ^[9] pins configurator is of great help to find valid alternatives thanks to its visual GUI.

Refer to STM32 DCMI bindings^[1] for more details.

3.2.3. STM32CubeMX pins configurator[edit | edit source]

STM32CubeMX ^[10] pins configurator is of great help to find valid alternatives thanks to its visual GUI.

Refer to STM32 DCMIPP bindings^[1] for more details.

3.3. DT configuration examples[edit | edit source]

3.3.1. For STM32MP13x lines [edit | edit source]

	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		reg = <0x3c>;
		clocks = <&clk_ext_camera>;
		clock-names = "xclk";
		DOVDD-supply = <&scmi_v3v3_sw>;
		status = "okay";
		powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;

		port {
			ov5640_0: endpoint {
				/*remote-endpoint = <&mipid02_0>;*/
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};

This section, part of the STM32MP135x-DK Discovery kit device tree file^[2], enables the support of the OV5640 Omnivision camera sensor^[4] located on the MB1723 camera daughter board]] connected to the CN1 camera connector^[11] of the STM32MP135x-DK Discovery kit . DCMIPP hardware block interconnects with the OV5640 camera sensor through the MIPID02 CSI-2 to parallel bridge of STM32MP135x-DK Discovery kit .

Refer to the OV5640 bindings ^[4] and the MIPID02 bridge bindings ^[12] for more details.

Documentation on various V4L2 camera sensors can be found inside I2C media bindings folder Documentation/devicetree/bindings/media/i2c . Refer to the dedicated sensor binding documentation to adapt your board device tree file to this dedicated sensor.

3.3.2. For STM32MP2 series[edit | edit source]

3.3.2.1. For MIPI CSI serial interface camera sensor[edit | edit source]

Refer to the DT configuration (board level) chapter for DT configuration examples on official STM32MP2 series boards.

3.3.2.2. For parallel interface camera sensor[edit | edit source]

The below example described a board device tree using the DCMIPP with the MB1379 camera daughterboard (Omnivision ov5640 camera sensor in parallel interface mode):

...
&dcmipp {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&dcmi_test_pins_b>;
	pinctrl-1 = <&dcmi_sleep_test_pins_b>;

	port {
		dcmipp_0: endpoint {
			/*
			 * Replace the existing remote-endpoint property with the following
			 * one in order to enable CSI-2 interface in front of the DCMIPP
			 */
			/* remote-endpoint = <&csi_source>; */
			remote-endpoint = <&ov5640_0>;
			bus-type = <5>;
			bus-width = <8>;
			hsync-active = <0>;
			vsync-active = <0>;
			pclk-sample = <1>;
		};
	};
};
...
&i2c2 {
...
	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		reg = <0x3c>;
		clocks = <&clk_ext_camera>;
		clock-names = "xclk";
		rotation = <180>;
		/*
		 * powerdown / reset differ between the MB1723 (CSI-2) and the MB1379 (Parallel)
		 * Following properties dedicated to CSI-2 should replace the existing ones
		 * if the OV5640 is used in CSI-2 mode
		 * powerdown-gpios = <&gpiok 1 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		 * reset-gpios = <&gpiok 0 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		 */
		powerdown-gpios = <&gpiok 0 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>;
		reset-gpios = <&gpiok 1 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
		status = "okay";

		port {
			ov5640_0: endpoint {
				/*
				 * Following properties are CSI-2 specifics and should only be
				 * defined when the OV5640 is used in CSI-2 mode.  They should
				 * replace the other properties dedicated to parallel interface
				 */
				/* data-lanes = <0 1>; */
				/* link-frequencies = /bits/ 64 <456000000>; */
				/* remote-endpoint = <&csi_sink>; */
				remote-endpoint = <&dcmipp_0>;
				bus-type = <5>;
				bus-width = <8>;
				data-shift = <2>; /* lines 9:2 are used */
				hsync-active = <0>;
				vsync-active = <0>;
				pclk-sample = <1>;
				pclk-max-frequency = <120000000>;
			};
		};
	};

...
};
...

Documentation on various V4L2 camera sensors can be found inside I2C media bindings folder Documentation/devicetree/bindings/media/i2c . Refer to the dedicated sensor binding documentation to adapt your board device tree file to this dedicated sensor.

4. How to configure the DT using STM32CubeMX[edit | edit source]

The STM32CubeMX tool can be used to configure the STM32MPU device and get the corresponding platform configuration device tree files.
The STM32CubeMX may not support all the properties described in the above DT bindings documentation paragraph. If so, the tool inserts user sections in the generated device tree. These sections can then be edited to add some properties and they are preserved from one generation to another. Refer to STM32CubeMX user manual for further information.

5. References[edit | edit source]

Please refer to the following links for additional information:

[bindings-1] 1.0 ^1.1 ^1.2 ^1.3 Linux kernel STM32MP32 DCMIPP device tree bindings (st,stm32-dcmipp.yaml)

[stm32mp135fdk_bindings-2] 2.0 ^2.1 arch/arm/boot/dts/st/stm32mp135f-dk.dts

[gc2145_bindings-3] Linux kernel GC2145 bindings (galaxycore,gc2145.yaml)

[ov5640_bindings-4] 4.0 ^4.1 ^4.2 Linux kernel OV5640 bindings (ovti,ov5640.yaml)

[stm32mp13_pinctrl_dtsi-5] 5.0 ^5.1 Linux kernel STM32MP13 pinctrl device tree (stm32mp13-pinctrl.dtsi)

[6] STM32MP13 datasheets

[stm32mp25_pinctrl_dtsi-7] Linux kernel STM32MP25 pinctrl device tree file (stm32mp25-pinctrl.dtsi)

[8] STM32MP25 reference manuals

[9] STM32CubeMX

[10] STM32CubeMX

[11] CN1 Camera sensor connector

[mipid02_bindings-12] Linux kernel MIPID02 bindings (st,st-mipid02.yaml)

[1]

[2]

[3]

[4]

[5]

[6]

[7]

[8]

[9]

[10]

[11]

[12]