1. Article purpose[edit source]
The purpose of this article is to:
- briefly introduce the TSGEN peripheral and its main features
- indicate the level of security supported by this hardware block
- explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
- explain, when necessary, how to configure the TSGEN peripheral.
2. Peripheral overview[edit source]
The TSGEN peripheral generates a universal reference in time, named timestamps, and sends it to the CoreSight™ source peripherals (such as STM and ETM internal peripherals). Source peripherals use then this reference to integrate it in the generated trace. Since multiple trace generators can be implemented in a CoreSight system, timestamp allows to order traces chronologically.
2.1. Features[edit source]
Refer to the STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are really implemented.
2.2. Security support[edit source]
The TSGEN is a non secure peripheral.
3. Peripheral usage and associated software[edit source]
3.1. Boot time[edit source]
The TSGEN can be used at boot time to provide time stamping for ETM and STM traces.
3.2. Runtime[edit source]
3.2.1. Overview[edit source]
The TSGEN can be used at run time to provide time stamping for ETM and STM traces.
3.2.2. Software frameworks[edit source]
There is no software dedicated to the TSGEN internal peripheral delivered with STM32MPU ecosystem.
3.2.3. Peripheral configuration[edit source]
Configuration of the TSGEN is done via JTAG scripts. Those scripts must be built by user thanks to STM32MP15 reference manuals .
3.2.4. Peripheral assignment[edit source]
Internal peripherals assignment table template
| rowspan="1" | Trace & Debug | rowspan="1" | TSGEN | TSGEN | | | | No assignment possible |-
|}
4. References[edit source]