RDP for STM32C0

1. RDP level management

The STM32C0 silicon device life cycle is based on the RDP mechanism implemented for the FLASH interface, as specified in the STM32C0 reference manual (RM0490[1], section 4.5.1).

RDP protection level Debug Comments
Level 0: device open Allowed The boot address can be either the user flash memory, bootloader in system memory, or embedded SRAM, depending on the boot mode configuration.
Level 1: device memories protected Limited The boot address can be either the user flash memory, bootloader in system memory, or embedded SRAM, depending on the boot mode configuration.

Debug access to the user flash memory, embedded SRAM, and backup registers is not allowed.

Level 2: device closed None The boot address must target the user flash memory. The flash memory user option bytes are read-only, so RDP level 2 cannot be changed.

The figure below illustrates the level transitions:

STM32C0 RDP level management

Changing the read protection level:

  • From level 0 to level 1: write any other values than 0xCC or 0xAA in the RDP register.
  • From level 0 or 1 to level 2: write 0xCC in the RDP register.
  • From level 1 to level 0: write 0xAA in the RDP register.

2. RDP password regression

Regression allows the reopening of the product by returning to RDP level 0. A full user flash memory mass erase is applied prior to the reopening.

Mass erase (full or partial) is only triggered by the RDP regression from level 1 to level 0.

3. References