1. Warning
| ID |
Summary
|
| 140972 |
The latest Eclipse CDT™ version 11.0.0 requires Java® 17 while some plug-ins inside STM32CubeIDE are incompatible with Java® 17. This patch fixes the issues with the Toolchain Manager and with OpenSTLinux installation.
To fix this issue, STM32CubeIDE v1.11.2.
Patch limitation: The patch does not fix the issue with downloading plug-ins from the Eclipse Marketplace. To fix the Eclipse Marketplace issue, the JRE must be updated, which is not done in the STM32CubeIDE v1.11.2.
|
2. Delta between 1.10.0 and 1.10.1
| ID |
Summary
|
| 131250 |
STM32CubeMX v6.6.0. integrated into STM32CubeIDE v1.10.0 may accidentally remove source files when performing a project migration. STM32CubeMX v6.6.1 integrated in STM32CubeIDE v1.10.1 fixes this issue.
|
3. Fixed issues
| ID |
Summary
|
| 74251 |
SWV Exception Trace log data tab displays a peripheral column, which is always empty.
|
| 101005[1] |
New JRE™ bundling does not automatically import private certificate authorities, that are needed for secure connections. See the following knowledge article for a solution here.
|
| 124465 |
STM32CubeIDE 1.9.0 is unable to debug the Cortex®-M0+ core of the STM32WL product. Customers are advised to use STM32CubeIDE 1.8.0.
|
| 126202 |
Debug unable to launch or crashes sporadically on some Linux® systems with GDB-client from Arm GCC10 package. Regression vs GCC9. Work-arounds: Use GCC9 or copy/replace arm-none-eabi-gdb from GCC9 to GCC10.
|
4. Known issues
The known issues are split into general, OS-specific, and target-specific issues.
4.1. General issues
| ID |
Summary
|
| 59435 |
Having a space or non-ASCII character in the project/workspace path or installation path is not fully supported.
|
| 63624 |
Some STM32CubeMX pop-up dialogs are not opened in front of the STM32CubeIDE workbench on all OS's.
|
| 68184 |
Hierarchical projects cannot be imported with the option Copy into workspace.
|
| 68440 |
Hierarchical projects cannot be renamed.
|
| 89454 |
Restart configuration only works for flash memory projects and not for RAM projects. Program Counter register is not set correctly. Manual work-around: In Restart configuration, manually set PC to the ResetHandler() in RAM: set $pc = 0x20000xxx.
|
| 109764 |
FreeRTOS™ kernel-aware debugging: Full stack traces off all tasks do not work if configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
| 115928 |
Editing live expressions while target is running does not work with SEGGER J-Link.
|
| 124062 |
GCC-10 is more strict with respect to declaration of global variables in header files. Read the GCC-10 porting guide.
|
4.2. OS-specific issues
4.2.1. macOS®
| ID |
Summary
|
| 85064 |
Some macOS® versions report installation image corruption or that the image cannot be opened because the developer cannot be verified. The work-around is to execute the following command:
xattr -c /Applications/STM32CubeIDE.app.
|
4.3. Target-specific issues
4.3.1. STM32H7
| ID |
Summary
|
| 73552 |
Serial Wire Viewer configuration is not reset for STM32H7 devices on the next launch if it was terminated with record active when using ST-LINK GDB server.
|
| 79658 |
ST-LINK GDB server reports being suspended on address: 0x05F0001 when debugging STM32H7 dual-core devices and the core under debug goes to sleep.
|
| 81763 |
OpenOCD does not support debugging STM32H7 dual-core devices when the core under debug goes to sleep.
|
4.3.2. STM32MP1
| ID |
Summary
|
| 73456 |
The SFRs view is not aware of the device tree configuration and consequently shows all peripherals regardless if they are managed by the Cortex®-M or not.
|
| 73895 |
Debugging in production mode requires a network connection. If STM32CubeIDE is configured to use a network proxy, then the IP address of the STM32MP1 board needs to be added to the "Proxy bypass" list.
|
| 73896 |
The synchronization check between the IP-address entered in launch configuration and the IP-address of the target does not abort the launch in case of mismatch.
|
4.3.3. STM32WB
| ID |
Summary
|
| 124770 |
The user must modify the memory split between the CM4 and CM0+ core. There are multiple CM0+ pre-compiled stacks with different memory size requirements.
|
1. Same limitation for Linux® and macOS®