1. Article purpose[edit | edit source]
The purpose of this article is to:
- briefly introduce the ADC peripheral and its main features,
- indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
- list the software frameworks and drivers managing the peripheral,
- explain how to configure the peripheral.
2. Peripheral overview[edit | edit source]
The ADC peripheral is a successive approximation analog-to-digital converter.
The STM32MP13x SoCs have two ADC blocks, except for the STM32MP131 SoC which has only one ADC block. There is one physical ADC per block:
- Each ADC has up to 19 multiplexed channels (including 6 internal channels available only on ADC2).
- Configurable resolution: 6, 8, 10, 12 bits.
- The conversions can be performed in single, continuous, scan or discontinuous mode.
- The result can be read in a left- or right-aligned 32-bit data register by using CPU or DMA[1].
- The analog watchdog feature allows the application to detect if the input voltage goes beyond the user-defined, high or low thresholds.
- Each ADC clock can be selected between two different clock[2] sources (Synchronous or Asynchronous clock).
- The common reference voltage can be provided by either VREFBUF[3] or any other external regulator[4] wired to VREF+ pin.
Each ADC supports two contexts to manage conversions:
- Regular conversions can be done in sequence, running in background
- Injected conversions have higher priority, and so have the ability to interrupt the regular sequence (either triggered in SW or HW). The regular sequence is resumed, in case it has been interrupted.
- Each context has its own configurable sequence and trigger: software, TIM[5], LPTIM[6] and EXTI[7].
Refer to the STM32MP13 reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
3. Peripheral usage[edit | edit source]
This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor(s), and the STM32CubeMPU Package running on the Arm® Cortex®-M processor.
3.1. Boot time assignment[edit | edit source]
3.1.1. On STM32MP13x lines 
[edit | edit source]
The ADC is usually not used at boot time. But it may be used by the SSBL (see Boot chain overview), to check for power supplies for example.
Click on 
to expand or collapse the legend...
| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (ROM code) |
Cortex-A7 secure (TF-A BL2) |
Cortex-A7 non-secure (U-Boot) | |||
| Analog | ADC | Any instance | ☐ | |||
3.2. Runtime assignment[edit | edit source]
3.2.1. On STM32MP13x lines [edit | edit source]
Click on to expand or collapse the legend...
| Domain | Peripheral | Runtime allocation | Comment
| ||
|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) | |||
| Analog | ADC | ADC1 | ☐ | ☐ | Assignment (single choice) |
| ADC2 | ☐ | ☐ | Assignment (single choice) ADC2 can be used for system supplies monitoring | ||
4. Software frameworks and drivers[edit | edit source]
Below are listed the software frameworks and drivers managing the ADC peripheral for the embedded software components listed in the above tables.
5. How to assign and configure the peripheral[edit | edit source]
The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral:
- partial device trees (pin control and clock tree) generation for the OpenSTLinux software components,
- HAL initialization code generation for the STM32CubeMPU Package.
The configuration is applied by the firmware running in the context in which the peripheral is assigned.
For the Linux kernel, U-boot and OP-TEE configuration, please refer to ADC device tree configuration article.
6. How to go further[edit | edit source]
See application notes:
7. References[edit | edit source]
Arm® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere. 