1. Article purpose[edit | edit source]
The purpose of this article is to:
- Briefly introduce the IAC peripheral and its main features.
- Indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts).
- List the software frameworks and drivers managing the peripheral.
- Explain how to configure the peripheral.
2. Peripheral overview[edit | edit source]
The IAC peripheral is used to catch illegal accesses done on RIF protected features. Illegal access means an access that infringes one of the RIF configurations (secure, privilege, or CID filtering). Once an illegal access is detected, the ID of the protected resource on which it was caused is registered and an interrupt can be raised to the trusted secure CPU. It is possible to enable/disable the interrupt generation for each hardware block.
Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
3. Peripheral usage[edit | edit source]
This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor, and the STM32CubeMPU Package running on the Arm® Cortex®-M processor.
3.1. Boot time assignment[edit | edit source]
3.1.1. On STM32MP2 series[edit | edit source]
Click on 
to expand or collapse the legend...
| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (ROM code) |
Cortex-A35 secure (TF-A BL2) |
Cortex-A35 non-secure (U-Boot) | |||
| Security | IAC | IAC | ⬚ | Fixed to TDCID | ||
3.2. Runtime assignment[edit | edit source]
3.2.1. On STM32MP25x lines 
[edit | edit source]
Click on to expand or collapse the legend...
| Domain | Peripheral | Runtime allocation | Comment
| |||||
|---|---|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 non-secure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 non-secure (STM32Cube) |
Cortex-M0+ (STM32Cube) | |||
| Security | IAC | IAC | ✓OP-TEE | ⬚ | Fixed to TDCID | |||
4. Software frameworks and drivers[edit | edit source]
Below are listed the software frameworks and drivers managing the IAC peripheral for the embedded software components listed in the above tables.
5. How to assign and configure the peripheral[edit | edit source]
The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral by generating:
- Partial device trees (pin control and clock tree) for the OpenSTLinux software components.
- HAL initialization code for the STM32CubeMPU Package.
The configuration is statically applied by a firmware running in the TDCID state. Either OP-TEE or TF-M.
6. How to go further[edit | edit source]
To better understand IAC events, refer to the wiki article How to analyze IAC & SERC errors.
7. References[edit | edit source]
Arm® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere. 