1. Article purpose[edit | edit source]
The purpose of this article is to:
- briefly introduce the COMBOPHY peripheral and its main features,
- indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
- list the software frameworks and drivers managing the peripheral,
- explain how to configure the peripheral.
2. Peripheral overview[edit | edit source]
The COMBOPHY peripheral is used as protocol PHY for the USB3DR or PCIe. It provides:
- the physical layer for differential Rx/Tx data encoding,
- the 100 MHz differential reference clock provided to the pins and the PCIe controller.
The 100 MHz PCIe internal reference clock can be sourced directly from:
- the PLL with a 20 MHz the crystal oscillator (HSE) input,
- an external PCIe 100 MHz differential reference clock (with SSC).
Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
3. Peripheral usage[edit | edit source]
This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor(s), and the STM32CubeMPU Package running on the Arm® Cortex®-M processor.
3.1. Boot time assignment[edit | edit source]
3.1.1. On STM32MP2 series[edit | edit source]
Click on 
to expand or collapse the legend...
| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (ROM code) |
Cortex-A35 secure (TF-A BL2) |
Cortex-A35 non-secure (U-Boot) | |||
| High speed interface | COMBOPHY | COMBOPHY | ☐ | |||
3.2. Runtime assignment[edit | edit source]
3.2.1. On STM32MP25x lines 
[edit | edit source]
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| Domain | Peripheral | Runtime allocation | Comment
| |||||
|---|---|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 non-secure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 non-secure (STM32Cube) |
Cortex-M0+ (STM32Cube) | |||
| High speed interface | COMBOPHY | COMBOPHY | ⬚OP-TEE | ☐ | ⬚ | ⬚ | COMBOPHY can be assigned to either the USB3DR or the PCIe. | |
4. Software frameworks and drivers[edit | edit source]
Below are listed the software frameworks and drivers managing the COMBOPHY peripheral for the embedded software components listed in the above tables.
- Linux®: COMBOPHY driver (drivers/phy/st/phy-stm32-combophy.c )
5. How to assign and configure the peripheral[edit | edit source]
The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral by generating:
- partial device trees (pin control and clock tree) for the OpenSTLinux software components,
- HAL initialization code for the STM32CubeMPU Package.
The configuration is applied by the firmware running in the context in which the peripheral is assigned.
For Linux kernel, please refer to the COMBOPHY device tree configuration
6. References[edit | edit source]
Arm® is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere. 