1. Introduction to External device tree component
The External device tree component is used to host MPU embedded SW device tree configurations. As configurations become increasingly complex especially for the firewall configuration (RIF), clock tree and memory mapping, it is important and mandatory to synchronize all software components device tree in one place. It permits to have a coherent configuration across all of them. A consistent product configuration is given as example by ST in this repository. Note that a board device tree with minimal configuration is still present in each software component like you used to use. This configuration can also be named "open" disabling the CID filtering and only securing peripheral used by secure world.
2. Component split
As explained above, this component collapses product/boards device tree of all software components used in MPU embedded SW delivery..The device tree files related to the SoC definition are located in each SW component:
- RIF (firewall) configuration: stm32mp257f-ev1-ca35tdcid-ostl-rif.dtsi
- RCC (Clock tree) configuration: stm32mp257f-ev1-ca35tdcid-ostl-rcc.dtsi
- Memory mapping configuration: stm32mp257f-ev1-ca35tdcid-ostl-resmem.dtsi
- Board configuration: stm32mp257f-ev1-ca35tdcid-ostl.dts
DT name example given for an EV1 board with Cortex-A35 set as main processor.
Note that this repository is not self-content as it relies on soc dtsi files defined in each software component.
3. Component usage
This repository can be found here . It can directly be used by OSTL Yocto build system or directly by each software component. Let see how to use it:
- Yocto:
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Coming soon |
- TF-A: External device tree in TF-A
- OPTEE:
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Coming soon |
- U-Boot: External device tree in U-Boot
- Linux: External device tree usage in Linux (see section 7)
- TFM:
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Coming soon |