1. Article purpose
The purpose of this article is to:
- Briefly introduce the RNG peripheral and its main features,
- Indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
- List the software frameworks and drivers managing the peripheral,
- Explain how to configure the peripheral.
2. Peripheral overview
The RNG peripheral is used to provide 32-bit random numbers.
Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
The RNG can be assigned to non-secure or secure world (default behavior). If the RNG is assigned to the secure world then the non-secure world can request random numbers through the OP-TEE RNG PTA. More information about this mechanism can be found in OP-TEE documentation [1]. Else, the software component uses its RNG driver directly.
What is applicable for the Linux Kernel is applicable for U-Boot.
3. Peripheral usage
This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor(s), and the STM32CubeMPU Package running on the Arm® Cortex®-M processor.
The hardware RNG peripheral for Arm® Cortex®-A processor is default assigned to OP-TEE. This is the default and recommended setup.
It is possible to assign the RNG to the Linux Kernel, but it is necessary to deactivate it in OP-TEE device tree and activate it in the Linux kernel device tree, declare it as a firewall exception in the OP-TEE firewall driver and declare your board in the flavorlist-no_rng in the OP-TEE board configuration makefile .
3.1. Boot time assignment
3.1.1. On STM32MP13x lines 
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| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (ROM code) |
Cortex-A7 secure (TF-A BL2) |
Cortex-A7 non-secure (U-Boot) | |||
| Security | RNG | RNG | ✓ | ☑ | ☐ | Required for DPA peripheral protection |
3.1.2. On STM32MP15x lines
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| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (ROM code) |
Cortex-A7 secure (TF-A BL2) |
Cortex-A7 non-secure (U-Boot) | |||
| Security | RNG | RNG1 | ☑ | ☐ | ||
3.1.3. On STM32MP2 series
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| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (ROM code) |
Cortex-A35 secure (TF-A BL2) |
Cortex-A35 non-secure (U-Boot) | |||
| Security | RNG | RNG | ✓ | ☑ | ☐ | |
3.2. Runtime assignment
If the Arm® Cortex®-A processor hardware RNG peripheral is assigned to OP-TEE, then the Linux Kernel can request random numbers through the hardware random framework which is interfaced with the OP-TEE RNG Linux driver .
If the Arm® Cortex®-A processor hardware RNG peripheral is assigned to the Linux Kernel, then the Linux Kernel can access it through the hardware random framework which is interfaced with the Linux RNG driver .
3.2.1. On STM32MP13x lines
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| Domain | Peripheral | Runtime allocation | Comment
| ||
|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) | |||
| Security | RNG | RNG | ☐ | ☐ | Assignment (single choice) |
3.2.2. On STM32MP15x lines
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| Domain | Peripheral | Runtime allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) |
Cortex-M4 (STM32Cube) | |||
| Security | RNG | RNG1 | ☐ | ☐ | Assignment (single choice) | |
| RNG2 | ☐ | |||||
3.2.3. On STM32MP25x lines
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| Domain | Peripheral | Runtime allocation | Comment
| |||||
|---|---|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 non-secure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 non-secure (STM32Cube) |
Cortex-M0+ (STM32Cube) | |||
| Security | RNG | RNG | ☑OP-TEE | ☐ | ☐ | ⬚ | ||
4. Software frameworks and drivers
Below are listed the software frameworks and drivers managing the RNG peripheral for the embedded software components listed in the above tables.
- Linux®: hardware random framework, Linux RNG driver and OP-TEE RNG Linux driver when random number generation is managed by OP-TEE (default behaviour)
- U-Boot: U-Boot RNG driver and OP-TEE RNG U-Boot driver
- OP-TEE: OP-TEE RNG driver and RNG PTA
- STM32Cube: RNG HAL driver and header file of RNG HAL module
5. How to assign and configure the peripheral
The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral:
- partial device trees (pin control and clock tree) generation for the OpenSTLinux software components,
- HAL initialization code generation for the STM32CubeMPU Package.
The configuration is applied by the firmware running in the context in which the peripheral is assigned.
This configuration is done in OP-TEE, through device tree.
Refer to RNG device tree configuration.
6. References