Registered User mNo edit summary |
Registered User mNo edit summary |
||
| Line 1: | Line 1: | ||
<noinclude>{{ApplicableFor | |||
|MPUs list=STM32MP13x, STM32MP15x | |||
|MPUs checklist=STM32MP13x,STM32MP15x | |||
}}</noinclude> | |||
==Article purpose== | ==Article purpose== | ||
The purpose of this article is to: | The purpose of this article is to: | ||
Revision as of 18:25, 17 June 2022
1. Article purpose
The purpose of this article is to:
- briefly introduce the Ethernet peripheral and its main features
- indicate the level of security supported by this hardware block
- explain how each instance can be allocated to the runtime contexts and linked to the corresponding software components
- explain, when necessary, how to configure the Ethernet peripheral.
2. Peripheral overview
The Ethernet peripheral (ETH) is based on Synopsys DesignWare® Ethernet GMAC IP, which enables the host to communicate data using the Gigabit Ethernet protocol (IEEE 802.3) at 10, 100 and 1000 Mbps.
The peripheral is composed of three main layers: the gigabit ethernet media access controller (GMAC), the MAC transaction layer (MTL), and the MAC DMA controller (MDC).
The driver used to drive the ETH is Stmmac.
2.1. Features
The Ethernet peripheral main features are the following:
- Compliance with IEEE 802.3 specifications
- Support for IEEE 1588-2002 and IEEE 1588-2008 standards for precision networked clock synchronization
- IEEE 802.3-az for Energy Efficient Ethernet (EEE)
- IEEE 802.3x flow control automatic transmission of zero-quanta pause frame on flow control input de-assertion.
- IEEE 802.1Q VLAN tag detection for reception frames on STM32MP15x lines
only - AMBA 2.0 for AHB Master/Slave ports and AMBA 3.0 for AXI Master/Slave ports
- Configurability allowing to support data transfer rates of 10/100/100 Mbps, 10/100 Mbps only or 1000 Mbps only
- Support for multiple TCP/IP offload functions
Refer to STM32MP13 reference manuals or STM32MP15 reference manuals for the complete features list, and to the software components, introduced below, to see which features are implemented.
2.2. Security support
2.2.1. On STM32MP13x lines
The two ETH instances are secure peripherals (under ETZPC control).
2.2.2. On STM32MP15x lines
The single instance ETH is a non-secure peripheral.
3. Peripheral usage and associated software
3.1. Boot time
The Ethernet peripheral can be used at boot time by SSBL (by UBoot with tftp protocol for image loading). See How_to_boot_the_kernel_via_TFTP_from_U-Boot for more details.
3.2. Runtime
3.2.1. Overview
The Ethernet peripheral(s) can be allocated to the Arm® Cortex®-A7 non-secure core to be controlled in Linux® by the NetDev Framework.
3.2.2. Software frameworks
3.2.2.1. On STM32MP13x lines
| Domain | Peripheral | Software components | Comment | |
|---|---|---|---|---|
| OP-TEE | Linux | |||
| Networking | ETH | Linux netdev/ethernet framework | ||
3.2.2.2. On STM32MP15x lines
| Domain | Peripheral | Software components | Comment | ||
|---|---|---|---|---|---|
| OP-TEE | Linux | STM32Cube | |||
| Networking | ETH | Linux netdev/ethernet framework | |||
3.2.3. Peripheral configuration
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article. When the Ethernet peripheral is assigned to the Linux® OS, it is configured through the device tree according to the information given in the Ethernet device tree configuration article.
3.2.4. Peripheral assignment
3.2.4.1. On STM32MP13x lines
Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:
- ☐ means that the peripheral can be assigned (☑) to the given runtime context.
- ⬚ means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
- ✓ is used for system peripherals that cannot be unchecked because they are statically connected in the device.
Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP13 reference manuals.
| Domain | Peripheral | Runtime allocation | Comment | ||
|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) | |||
| Networking | ETH | ETH1 | ⬚ | ☐ | Assignment (single choice) |
| ETH2 | ⬚ | ☐ | Assignment (single choice) | ||
3.2.4.2. On STM32MP15x lines
Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:
- ☐ means that the peripheral can be assigned (☑) to the given runtime context.
- ✓ is used for system peripherals that cannot be unchecked because they are statically connected in the device.
Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP15 reference manuals.
| Domain | Peripheral | Runtime allocation | Comment | |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) |
Cortex-M4 (STM32Cube) | |||
| Networking | ETH | ETH | ☐ | Assignment (single choice) | ||
4. References