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<noinclude> | <noinclude>{{ApplicableFor | ||
{{ | |MPUs list=STM32MP13x, STM32MP15x, STM32MP25x | ||
{{ | |MPUs checklist=STM32MP13x,STM32MP15x, STM32MP25x | ||
{{ | }}</noinclude> | ||
==Article purpose== | |||
The purpose of this article is to: | |||
* briefly introduce the BKPSRAM internal memory peripheral and its main features, | |||
* indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts), | |||
* list the software frameworks and drivers managing the peripheral, | |||
* explain how to configure the peripheral. | |||
==Peripheral overview== | |||
The '''BKPSRAM''' internal memory is located in the VSW power domain, allowing it to be supplied during Standby [[Power overview|low power mode]], or to be switched off. | |||
* {{MicroprocessorDevice | device=13}} BKPSRAM is 8 Kbytes wide. | |||
* {{MicroprocessorDevice | device=15}} BKPSRAM is 4 Kbytes wide. | |||
* {{MicroprocessorDevice | device=2}} BKPSRAM is 8 Kbytes wide. | |||
On {{MicroprocessorDevice | device=1}}, BKPSRAM could be completely assigned to the different execution contexts thanks to [[ETZPC internal peripheral|ETZPC firewall]]. </br> | |||
On {{MicroprocessorDevice | device=2}}, BKPSRAM could be shared between the different execution contexts thanks to [[RISAF internal peripheral|RISAF firewall]].</br> | |||
BKPSRAM is protected by [[TAMP internal peripheral|tamper detection circuit]] and is erased by hardware in case of tamper detection. | |||
Refer to the [[STM32 MPU resources#Reference manuals|STM32 MPU reference manuals]] for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented. | |||
==Peripheral usage== | |||
This chapter is applicable in the scope of the '''OpenSTLinux BSP''' running on the Arm<sup>®</sup> Cortex<sup>®</sup>-A processor(s), and the '''STM32CubeMPU Package''' running on the Arm<sup>®</sup> Cortex<sup>®</sup>-M processor. | |||
[[ | ===Boot time assignment=== | ||
====On {{MicroprocessorDevice | device=1}}==== | |||
The BKPSRAM internal memory is not used during a [[Boot chain overview|cold boot]] or a wake up from Standby with [[DDRCTRL and DDRPHYC internal peripherals|DDR]] OFF. | |||
The BKPSRAM internal memory is used by the runtime secure monitor (from the [[Boot chain overview|FSBL]] or the [[STM32 MPU OP-TEE overview|OP-TEE secure OS]]) during wake-up from Standby [[Power overview|low power mode]] with the [[DDRCTRL and DDRPHYC internal peripherals|DDR]] in Self-Refresh mode. In that case, the BKPSRAM internal memory contains the secure context that has to be restored before jumping back to Linux execution, in [[DDRCTRL and DDRPHYC internal peripherals|DDR]]. | |||
[[ | {{#lst:STM32MP1_internal_peripherals_assignment_table_template|stm32mp1_boottime}} | ||
<section begin=stm32mp13_boottime /><section begin=stm32mp15_boottime /> | |||
</ | | rowspan="1" | Core/RAM | ||
| rowspan="1" | [[BKPSRAM internal memory|BKPSRAM]] | |||
| BKPSRAM | |||
| | |||
| <span title="assigned peripheral" style="font-size:21px">☑</span> | |||
| <span title="assigned peripheral" style="font-size:21px">⬚</span> | |||
| | |||
|- | |||
<section end=stm32mp13_boottime /><section end=stm32mp15_boottime /> | |||
|} | |||
== | ====On {{MicroprocessorDevice | device=2}}==== | ||
The | The BKPSRAM internal memory is not used during a [[Boot chain overview|cold boot]] or a wake up from Standby with [[DDRCTRL and DDRPHYC internal peripherals|DDR]] OFF. | ||
The BKPSRAM internal memory is used by the runtime secure monitor [[TF-A overview|TF-A BL2 secure monitor]] during wake-up from Standby [[Power overview|low power mode]] with the [[DDRCTRL and DDRPHYC internal peripherals|DDR]] in Self-Refresh mode. In that case, the BKPSRAM internal memory contains the secure context that has to be restored before jumping back to [[STM32 MPU OP-TEE overview|OP-TEE secure OS]] and Linux execution, in [[DDRCTRL and DDRPHYC internal peripherals|DDR]]. | |||
{{#lst:STM32MP2_internal_peripherals_assignment_table_template|stm32mp2_a35_boottime}} | |||
<section begin=stm32mp25_a35_boottime /> | |||
| rowspan="1" | Core/RAM | |||
| rowspan="1" | [[BKPSRAM internal memory|BKPSRAM]] | |||
| BKPSRAM | |||
| | |||
| <span title="assigned peripheral" style="font-size:21px">☑</span> | |||
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span> | |||
| | |||
|- | |||
<section end=stm32mp25_a35_boottime /> | |||
|} | |||
=== | ===Runtime assignment=== | ||
====On {{MicroprocessorDevice | device=13}}==== | |||
{{#lst:STM32MP1_internal_peripherals_assignment_table_template|stm32mp13_runtime}} | |||
<section begin=stm32mp13_runtime /> | |||
| rowspan="1" | Core/RAM | |||
| rowspan="1" | [[BKPSRAM internal memory|BKPSRAM]] | |||
| BKPSRAM | |||
| <span title="assigned peripheral" style="font-size:21px">☑</span> | |||
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span> | |||
| Assignment (single choice) | |||
|- | |||
<section end=stm32mp13_runtime /> | |||
|} | |||
== | ====On {{MicroprocessorDevice | device=15}}==== | ||
=== | {{#lst:STM32MP1_internal_peripherals_assignment_table_template|stm32mp15_runtime}} | ||
<section begin=stm32mp15_runtime /> | |||
| rowspan="1" | Core/RAM | |||
| rowspan="1" | [[BKPSRAM internal memory|BKPSRAM]] | |||
| BKPSRAM | |||
| <span title="assigned peripheral" style="font-size:21px">☑</span> | |||
| <span title="assigned peripheral" style="font-size:21px">⬚</span> | |||
| <span title="assigned peripheral" style="font-size:21px">⬚</span> | |||
| Assignment (single choice) | |||
|- | |||
<section end=stm32mp15_runtime /> | |||
|} | |||
====On {{MicroprocessorDevice | device=25}}==== | |||
{{#lst:STM32MP2_internal_peripherals_assignment_table_template|stm32mp25_runtime}} | |||
<section begin=stm32mp25_a35_runtime /> | |||
| rowspan="1" | Core/RAM | |||
| rowspan="1" | [[BKPSRAM internal memory|BKPSRAM]] | |||
| BKPSRAM | |||
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span><sup>OP-TEE</sup> | |||
<span title="assigned peripheral" style="font-size:21px">☑</span><sup>TF-A BL31</sup> | |||
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span> | |||
| <span title="assigned peripheral" style="font-size:21px">☑</span> | |||
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span> | |||
| | |||
| TF-M uses BKPSRAM for ITS (Internal Trusted Storage) | |||
|- | |||
<section end=stm32mp25_a35_runtime /> | |||
|} | |||
== | ==Software frameworks and drivers== | ||
==== | ==={{MicroprocessorDevice | device=1}}=== | ||
On {{MicroprocessorDevice | device=1}}, the BKPSRAM peripheral can be allocated to either: | |||
* the Arm<sup>®</sup> Cortex<sup>®</sup>-A7 secure to be used | * the Arm<sup>®</sup> Cortex<sup>®</sup>-A7 secure to be used by the runtime secure monitor (from the [[Boot chain overview|FSBL]] or the [[STM32 MPU OP-TEE overview|OP-TEE secure OS]]) to save/restore the secure context before entering/after exiting Standby [[Power overview|low power mode]] with DDR in Self-Refresh mode. Standby low power mode is reached thanks to PSCI <ref>http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf</ref> secure services (from the [[Boot chain overview|FSBL]] or [[STM32 MPU OP-TEE overview|OP-TEE]] secure monitor). This is the default assignment. | ||
or | or | ||
* the Cortex-A7 non-secure to be used under Linux<sup>®</sup> as [[Reserved memory|reserved memory]], for instance. | * the Cortex-A7 non-secure to be used under Linux<sup>®</sup> as [[Reserved memory|reserved memory]], for instance. | ||
{{Warning | Default OpenSTLinux delivery prevents to define BKPSRAM as non-secure. This requires to modify TF-A source code with one of the following strategies: | |||
{{ | * set BKPSRAM as non-secure and degrade low power modes support, removing Standby mode | ||
or | |||
* manage on-the-fly secure/non-secure switch of the BKPSRAM in the secure monitor for sequential usage for Standby management and Linux kernel reserved memory}} | |||
Thus, below are listed the software frameworks and drivers managing the BKPSRAM peripheral for the embedded software components listed in the above tables. | |||
* '''Linux<sup>®</sup>''': [[Reserved memory|Linux reserved memory]] | |||
* '''OP-TEE''': [[STM32 MPU OP-TEE overview|OP-TEE]] secure monitor | |||
< | * '''TF-A BL2''': [[Boot chain overview|FSBL]] | ||
* '''U-Boot''': [[Boot chain overview|SSBL]] | |||
==={{MicroprocessorDevice | device=2}}=== | |||
On {{MicroprocessorDevice | device=2}}, a default OpenSTLinux default BKPSRAM memory mapping is proposed, sharing BKSPRAM between : | |||
* Cortex-A35 secure context for secure context save/restore before entering/after exiting Standby [[Power overview|low power mode]] | |||
* Cortex-M33 secure context for Internal Protected Storage support | |||
It is possible for customer to adapt this memory mapping by creating additional memory regions for other purposes.</br> | |||
Note: Required OpenSTLinux BKPSRAM memory region should be preserved and correctly resized to not degrade existing functionalities. | |||
==How to | |||
Thus, below are listed the software frameworks and drivers managing the BKPSRAM peripheral for the embedded software components listed in the above tables. | |||
* '''Linux<sup>®</sup>''': [[Reserved memory|Linux reserved memory]] | |||
* '''OP-TEE''': [[STM32 MPU OP-TEE overview|OP-TEE]] secure monitor | |||
* '''TF-A BL2''': [[Boot chain overview|FSBL]] | |||
* '''U-Boot''': [[Boot chain overview|SSBL]] | |||
* '''TF-M''': [[TF-M overview|TF-M]] | |||
==How to assign and configure the peripheral== | |||
The peripheral assignment can be done via the [[STM32CubeMX]] graphical tool (and manually completed if needed).<br /> | |||
This tool also helps to configure the peripheral: | |||
* partial device trees (pin control and clock tree) generation for the OpenSTLinux software components, | |||
* HAL initialization code generation for the STM32CubeMPU Package. | |||
The configuration is applied by the firmware running in the context in which the peripheral is assigned. | |||
==References== | ==References== | ||
<references/> | <references/> | ||
<noinclude> | |||
[[Category:RAM interfaces]] | |||
{{ArticleBasedOnModel| Internal peripheral article model}} | |||
{{PublicationRequestId | 8335 | 2018-08-29 | PhilipS}} | |||
</noinclude> | |||
Latest revision as of 15:45, 25 July 2024
1. Article purpose
The purpose of this article is to:
- briefly introduce the BKPSRAM internal memory peripheral and its main features,
- indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
- list the software frameworks and drivers managing the peripheral,
- explain how to configure the peripheral.
2. Peripheral overview
The BKPSRAM internal memory is located in the VSW power domain, allowing it to be supplied during Standby low power mode, or to be switched off.
- STM32MP13x lines
BKPSRAM is 8 Kbytes wide. - STM32MP15x lines BKPSRAM is 4 Kbytes wide.
- STM32MP2 series BKPSRAM is 8 Kbytes wide.
On STM32MP1 series, BKPSRAM could be completely assigned to the different execution contexts thanks to ETZPC firewall.
On STM32MP2 series, BKPSRAM could be shared between the different execution contexts thanks to RISAF firewall.
BKPSRAM is protected by tamper detection circuit and is erased by hardware in case of tamper detection.
Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
3. Peripheral usage
This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor(s), and the STM32CubeMPU Package running on the Arm® Cortex®-M processor.
3.1. Boot time assignment
3.1.1. On STM32MP1 series
The BKPSRAM internal memory is not used during a cold boot or a wake up from Standby with DDR OFF.
The BKPSRAM internal memory is used by the runtime secure monitor (from the FSBL or the OP-TEE secure OS) during wake-up from Standby low power mode with the DDR in Self-Refresh mode. In that case, the BKPSRAM internal memory contains the secure context that has to be restored before jumping back to Linux execution, in DDR.
Click on 
to expand or collapse the legend...
| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (ROM code) |
Cortex-A7 secure (TF-A BL2) |
Cortex-A7 non-secure (U-Boot) | |||
| Core/RAM | BKPSRAM | BKPSRAM | ☑ | ⬚ | ||
3.1.2. On STM32MP2 series
The BKPSRAM internal memory is not used during a cold boot or a wake up from Standby with DDR OFF.
The BKPSRAM internal memory is used by the runtime secure monitor TF-A BL2 secure monitor during wake-up from Standby low power mode with the DDR in Self-Refresh mode. In that case, the BKPSRAM internal memory contains the secure context that has to be restored before jumping back to OP-TEE secure OS and Linux execution, in DDR.
Click on to expand or collapse the legend...
| Domain | Peripheral | Boot time allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (ROM code) |
Cortex-A35 secure (TF-A BL2) |
Cortex-A35 non-secure (U-Boot) | |||
| Core/RAM | BKPSRAM | BKPSRAM | ☑ | ⬚ | ||
3.2. Runtime assignment
3.2.1. On STM32MP13x lines
Click on to expand or collapse the legend...
| Domain | Peripheral | Runtime allocation | Comment
| ||
|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) | |||
| Core/RAM | BKPSRAM | BKPSRAM | ☑ | ⬚ | Assignment (single choice) |
3.2.2. On STM32MP15x lines
Click on to expand or collapse the legend...
| Domain | Peripheral | Runtime allocation | Comment
| |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) |
Cortex-M4 (STM32Cube) | |||
| Core/RAM | BKPSRAM | BKPSRAM | ☑ | ⬚ | ⬚ | Assignment (single choice) |
3.2.3. On STM32MP25x lines
Click on to expand or collapse the legend...
| Domain | Peripheral | Runtime allocation | Comment
| |||||
|---|---|---|---|---|---|---|---|---|
| Instance | Cortex-A35 secure (OP-TEE / TF-A BL31) |
Cortex-A35 non-secure (Linux) |
Cortex-M33 secure (TF-M) |
Cortex-M33 non-secure (STM32Cube) |
Cortex-M0+ (STM32Cube) | |||
| Core/RAM | BKPSRAM | BKPSRAM | ⬚OP-TEE
☑TF-A BL31 |
⬚ | ☑ | ⬚ | TF-M uses BKPSRAM for ITS (Internal Trusted Storage) | |
4. Software frameworks and drivers
4.1. STM32MP1 series
On STM32MP1 series, the BKPSRAM peripheral can be allocated to either:
- the Arm® Cortex®-A7 secure to be used by the runtime secure monitor (from the FSBL or the OP-TEE secure OS) to save/restore the secure context before entering/after exiting Standby low power mode with DDR in Self-Refresh mode. Standby low power mode is reached thanks to PSCI [1] secure services (from the FSBL or OP-TEE secure monitor). This is the default assignment.
or
- the Cortex-A7 non-secure to be used under Linux® as reserved memory, for instance.
Thus, below are listed the software frameworks and drivers managing the BKPSRAM peripheral for the embedded software components listed in the above tables.
- Linux®: Linux reserved memory
- OP-TEE: OP-TEE secure monitor
- TF-A BL2: FSBL
- U-Boot: SSBL
4.2. STM32MP2 series
On STM32MP2 series, a default OpenSTLinux default BKPSRAM memory mapping is proposed, sharing BKSPRAM between :
- Cortex-A35 secure context for secure context save/restore before entering/after exiting Standby low power mode
- Cortex-M33 secure context for Internal Protected Storage support
It is possible for customer to adapt this memory mapping by creating additional memory regions for other purposes.
Note: Required OpenSTLinux BKPSRAM memory region should be preserved and correctly resized to not degrade existing functionalities.
Thus, below are listed the software frameworks and drivers managing the BKPSRAM peripheral for the embedded software components listed in the above tables.
- Linux®: Linux reserved memory
- OP-TEE: OP-TEE secure monitor
- TF-A BL2: FSBL
- U-Boot: SSBL
- TF-M: TF-M
5. How to assign and configure the peripheral
The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral:
- partial device trees (pin control and clock tree) generation for the OpenSTLinux software components,
- HAL initialization code generation for the STM32CubeMPU Package.
The configuration is applied by the firmware running in the context in which the peripheral is assigned.
6. References