DCMIPP internal peripheral

Applicable for

STM32MP13x lines, Unknown MPU

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1. Article purpose

The purpose of this article is to:

• briefly introduce the DCMIPP peripheral and its main features,
• indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
• list the software frameworks and drivers managing the peripheral,
• explain how to configure the peripheral.

2. Peripheral overview

The DCMIPP (digital camera memory interface pixel processor) peripheral is used to receive video data from an external parallel camera sensor device, or from any other digital video equipment supporting a parallel interface.

The DCMIPP hardware block can receive various frame data formats such as: RAW8, RGB565, YUV422 and other formats, as well as compressed data such as JPEG.

Moreover, on STM32MP25x lines :

• the DCMIPP is also connected to the CSI internal peripheral that provides an interface to communicate with MIPI^® CSI-compliant camera sensors: the DCMIPP is able to get pixels from the parallel or MIPI^® CSI interface.
• the DCMIPP embeds 3 dedicated pixel pipelines named "dump", "main" and "auxiliary": camera sensor data go into these pixel pipelines before they are sent to memory for further processing or display purposes.

Refer to the STM32 MPU reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.

3. Peripheral usage

This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm^® Cortex^®-A processor(s), and the STM32CubeMPU Package running on the Arm^® Cortex^®-M processor.

3.1. Boot time assignment

3.1.1. On STM32MP1 series

The DCMIPP peripheral is not used at boot time.

3.1.2. On STM32MP2 series

Click on to expand or collapse the legend...

• ⬚ means that the peripheral can be assigned to the given boot time context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
• ☐ means that the peripheral can be assigned to the given boot time context.
• ☑ means that the peripheral is assigned by default to the given boot time context and that the peripheral is mandatory for the STM32 MPU Embedded Software distribution.
• ✓ is used for system peripherals that cannot be unchecked because they are hardware connected in the device.

The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possibilities might be described in STM32MP25 reference manuals.

Domain	Peripheral	Boot time allocation				Comment
		Instance	Cortex-A35 secure (ROM code)	Cortex-A35 secure (TF-A BL2)	Cortex-A35 non-secure (U-Boot)
Visual	DCMIPP	DCMIPP			⬚

3.2. Runtime assignment

3.2.1. On STM32MP13x lines 

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STM32MP13 internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

• ⬚ means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
• ☐ means that the peripheral can be assigned to the given runtime context.
• ☑ means that the peripheral is assigned by default to the given runtime context and that the peripheral is mandatory for the STM32 MPU Embedded Software distribution.
• ✓ is used for system peripherals that cannot be unchecked because they are hardware connected in the device.

Refer to How to assign an internal peripheral to an execution context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possibilities might be described in STM32MP13 reference manuals.

Domain	Peripheral	Runtime allocation			Comment
		Instance	Cortex-A7 secure (OP-TEE)	Cortex-A7 non-secure (Linux)
Visual	DCMIPP	DCMIPP		☑

3.2.2. On STM32MP25x lines 

Click on to expand or collapse the legend...

STM32MP25 internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

• ⬚ means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
• ☐ means that the peripheral can be assigned to the given runtime context.
• ☑ means that the peripheral is assigned by default to the given runtime context and that the peripheral is mandatory for the STM32 MPU Embedded Software distribution.
• ✓ is used for system peripherals that cannot be unchecked because they are hardware connected in the device.

The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possibilities might be described in STM32MP25 reference manuals.

Domain	Peripheral	Runtime allocation						Comment
		Instance	Cortex-A35 secure (OP-TEE / TF-A BL31)	Cortex-A35 non-secure (Linux)	Cortex-M33 secure (TF-M)	Cortex-M33 non-secure (STM32Cube)	Cortex-M0+ (STM32Cube)
Visual	DCMIPP	DCMIPP	⬚OP-TEE	☑	⬚	☐

4. Software frameworks and drivers

Below are listed the software frameworks and drivers managing the DCMIPP peripheral for the embedded software components listed in the above tables.

• Linux^®: V4L2 framework
• STM32Cube:
  • for STM32MP13x lines : DCMIPP HAL driver and header file of DCMIPP HAL module
  • for STM32MP25x lines : DCMIPP HAL driver and header file of DCMIPP HAL module

5. How to assign and configure the peripheral

The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral:

• partial device trees (pin control and clock tree) generation for the OpenSTLinux software components,
• HAL initialization code generation for the STM32CubeMPU Package.

The configuration is applied by the firmware running in the context in which the peripheral is assigned.

See also additional information in the DCMIPP device tree configuration article for Linux^®.