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{{ApplicableFor | |||
|MPUs list=STM32MP15x | |||
|MPUs checklist=STM32MP13x, STM32MP15x, STM32MP25x | |||
}} | |||
==Article purpose== | ==Article purpose== | ||
The purpose of this article is to briefly introduce the | The purpose of this article is to: | ||
* briefly introduce the HSEM peripheral and its main features, | |||
* indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts), | |||
* list the software frameworks and drivers managing the peripheral, | |||
* explain how to configure the peripheral. | |||
==Peripheral overview== | ==Peripheral overview== | ||
The | The '''HSEM''' (hardware spinlock) peripheral is used to provide synchronization and mutual exclusion between heterogeneous processors. | ||
* 32 hardware semaphores are available on the platform. | * 32 hardware semaphores are available on the platform. | ||
* semaphores could be accessed by the Arm<sup>®</sup> Cortex<sup>®</sup>-A7 core and the Arm<sup>®</sup> Cortex<sup>®</sup>-M4 | * semaphores could be accessed by the Arm<sup>®</sup> Cortex<sup>®</sup>-A7 core and the Arm<sup>®</sup> Cortex<sup>®</sup>-M4 | ||
Refer to the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented. | |||
==Peripheral usage | ==Peripheral usage== | ||
===Boot time=== | This chapter is applicable in the scope of the '''OpenSTLinux BSP''' running on the Arm<sup>®</sup> Cortex<sup>®</sup>-A processor(s), and the '''STM32CubeMPU Package''' running on the Arm<sup>®</sup> Cortex<sup>®</sup>-M processor. | ||
===Boot time assignment=== | |||
====On {{MicroprocessorDevice | device=15}}==== | |||
The hardware semaphore is used at boot time for GPIO access protection between the Arm<sup>®</sup> Cortex<sup>®</sup>-A7 and Cortex<sup>®</sup>-M4 cores. | The hardware semaphore is used at boot time for GPIO access protection between the Arm<sup>®</sup> Cortex<sup>®</sup>-A7 and Cortex<sup>®</sup>-M4 cores. | ||
See [[How_to_configure_system_resources#Protecting_GPIO_and_EXTI_system_resources_by_hardware_semaphores | Protecting GPIO and EXTI system resources by hardware semaphores ]] for details. | |||
{{#lst:STM32MP1_internal_peripherals_assignment_table_template|stm32mp1_boottime}} | |||
<section begin=stm32mp15_boottime /> | |||
| rowspan="1" | Coprocessor | |||
| rowspan="1" | [[HSEM internal peripheral|HSEM]] | |||
| HSEM | |||
| | |||
| | |||
| <span title="assignable peripheral" style="font-size:21px">☐</span> | |||
| | |||
|- | |||
<section end=stm32mp15_boottime /> | |||
|} | |||
===Runtime assignment=== | |||
====On {{MicroprocessorDevice | device=15}}==== | |||
It does not make sense to allocate HSEM to a single runtime execution context, that is why it is enabled by default for both cores in the [[STM32CubeMX]]. | |||
The hardware semaphore is used at runtime for GPIO and EXTI access protection between the Arm<sup>®</sup> Cortex<sup>®</sup>-A7 and Cortex<sup>®</sup>-M4 cores. | |||
See [[How_to_configure_system_resources#Protecting_GPIO_and_EXTI_system_resources_by_hardware_semaphores | Protecting GPIO and EXTI system resources by hardware semaphores ]] for details. | |||
==== | {{#lst:STM32MP1_internal_peripherals_assignment_table_template|stm32mp15_runtime}} | ||
<section begin=stm32mp15_runtime /> | |||
| rowspan="1" | Coprocessor | |||
| rowspan="1" | [[HSEM internal peripheral|HSEM]] | |||
| HSEM | |||
| <span title="assignable peripheral but not supported" style="font-size:21px">⬚</span> | |||
| <span title="assigned peripheral" style="font-size:21px">☑</span> | |||
| <span title="assigned peripheral" style="font-size:21px">☑</span> | |||
| | |||
|- | |||
<section end=stm32mp15_runtime /> | |||
|} | |||
==Software frameworks and drivers== | |||
Below are listed the software frameworks and drivers managing the HSEM peripheral for the embedded software components listed in the above tables. | |||
* '''Linux<sup>®</sup>''': [[Hardware spinlock overview|hardware spinlock framework]] | |||
* '''STM32Cube''': [[STM32CubeMP15 Package architecture|HSEM HAL driver]] and {{CodeSource | STM32CubeMP1 | Drivers/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_hsem.h | header file of HSEM HAL module}} | |||
== | ==How to assign and configure the peripheral== | ||
The | The peripheral assignment can be done via the [[STM32CubeMX]] graphical tool (and manually completed if needed).<br /> | ||
This tool also helps to configure the peripheral: | |||
* partial device trees (pin control and clock tree) generation for the OpenSTLinux software components, | |||
* HAL initialization code generation for the STM32CubeMPU Package. | |||
The configuration is applied by the firmware running in the context in which the peripheral is assigned. | |||
The HSEM peripheral is shared between the Cortex-A and Cortex-M contexts, so a particular attention must be paid to have a complementary configuration on both contexts. | The HSEM peripheral is shared between the Cortex-A and Cortex-M contexts, so a particular attention must be paid to have a complementary configuration on both contexts. | ||
<noinclude> | <noinclude> | ||
[[Category:Core peripherals]] | [[Category:Core peripherals]] | ||
[[Category:Coprocessor management peripherals]] | [[Category:Coprocessor management peripherals]] | ||
{{ArticleBasedOnModel | Internal peripheral article model}} | |||
{{PublicationRequestId | 10251 | 2019-01-09 | AnneJ}} | {{PublicationRequestId | 10251 | 2019-01-09 | AnneJ}} | ||
</noinclude> | </noinclude> |
Latest revision as of 11:50, 8 February 2024
1. Article purpose
The purpose of this article is to:
- briefly introduce the HSEM peripheral and its main features,
- indicate the peripheral instances assignment at boot time and their assignment at runtime (including whether instances can be allocated to secure contexts),
- list the software frameworks and drivers managing the peripheral,
- explain how to configure the peripheral.
2. Peripheral overview
The HSEM (hardware spinlock) peripheral is used to provide synchronization and mutual exclusion between heterogeneous processors.
- 32 hardware semaphores are available on the platform.
- semaphores could be accessed by the Arm® Cortex®-A7 core and the Arm® Cortex®-M4
Refer to the STM32MP15 reference manuals for the complete list of features, and to the software frameworks and drivers, introduced below, to see which features are implemented.
3. Peripheral usage
This chapter is applicable in the scope of the OpenSTLinux BSP running on the Arm® Cortex®-A processor(s), and the STM32CubeMPU Package running on the Arm® Cortex®-M processor.
3.1. Boot time assignment
3.1.1. On STM32MP15x lines 
The hardware semaphore is used at boot time for GPIO access protection between the Arm® Cortex®-A7 and Cortex®-M4 cores. See Protecting GPIO and EXTI system resources by hardware semaphores for details.
Click on to expand or collapse the legend...
Domain | Peripheral | Boot time allocation | Comment ![]() | |||
---|---|---|---|---|---|---|
Instance | Cortex-A7 secure (ROM code) |
Cortex-A7 secure (TF-A BL2) |
Cortex-A7 non-secure (U-Boot) | |||
Coprocessor | HSEM | HSEM | ☐ |
3.2. Runtime assignment
3.2.1. On STM32MP15x lines 
It does not make sense to allocate HSEM to a single runtime execution context, that is why it is enabled by default for both cores in the STM32CubeMX.
The hardware semaphore is used at runtime for GPIO and EXTI access protection between the Arm® Cortex®-A7 and Cortex®-M4 cores. See Protecting GPIO and EXTI system resources by hardware semaphores for details.
Click on to expand or collapse the legend...
Domain | Peripheral | Runtime allocation | Comment ![]() | |||
---|---|---|---|---|---|---|
Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) |
Cortex-M4 (STM32Cube) | |||
Coprocessor | HSEM | HSEM | ⬚ | ☑ | ☑ |
4. Software frameworks and drivers
Below are listed the software frameworks and drivers managing the HSEM peripheral for the embedded software components listed in the above tables.
- Linux®: hardware spinlock framework
- STM32Cube: HSEM HAL driver and header file of HSEM HAL module
5. How to assign and configure the peripheral
The peripheral assignment can be done via the STM32CubeMX graphical tool (and manually completed if needed).
This tool also helps to configure the peripheral:
- partial device trees (pin control and clock tree) generation for the OpenSTLinux software components,
- HAL initialization code generation for the STM32CubeMPU Package.
The configuration is applied by the firmware running in the context in which the peripheral is assigned.
The HSEM peripheral is shared between the Cortex-A and Cortex-M contexts, so a particular attention must be paid to have a complementary configuration on both contexts.