SDMMC internal peripheral

Applicable for

1. Article purpose[edit source]

The purpose of this article is to

briefly introduce the SDMMC peripheral and its main features
indicate the level of security supported by this hardware block
explain how each instance can be allocated to the runtime contexts and linked to the corresponding software components
explain, when necessary, how to configure the SDMMC peripheral.

2. Peripheral overview[edit source]

The SDMMC peripheral is used to interconnect STM32 MPU to SD memory cards, SDIO and MMC devices.

2.1. Features[edit source]

Refer to the STM32MP13 reference manuals or STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are implemented.

2.2. Security support[edit source]

2.2.1. On STM32MP13x lines [edit source]

The SDMMC1/2 instances are secure peripherals (under ETZPC control).

2.2.2. On STM32MP15x lines [edit source]

The SDMMC1/2/3 instances are non-secure peripherals.

3. Peripheral usage and associated software[edit source]

3.1. Boot time[edit source]

SDMMC1/2 instances can be used to support memory boot on SD or MMC Flash devices.

The SDMMC3 (only present on STM32MP15x lines ) is not used at boot time.

Information

The SDMMC instances are ordered by address in the device tree arch/arm/boot/dts/stm32mp151.dtsi file for STM32MP15x lines :

sdmmc3: sdmmc@48004000 {
...
sdmmc1: sdmmc@58005000 {
...
sdmmc2: sdmmc@58007000 {

By default, in OpenSTLinux distribution, sdmmc3 is disabled so the sdmmc1 (SD card on Evaluation boards and Discovery kits) and sdmmc2 (eMMC on Evaluation boards and Wifi on Discovery kits) are respectively aliased to mmc0 and mmc1.
If you enable sdmmc3, it will take the mmc0 alias and the aliases above will shift, so don't forget to update the Linux kernel boot command accordingly!
For instance, 'root=/dev/mmcblk0p6' will become 'root=/dev/mmcblk1p6' to mount the rootfs from the sdmmc1 (SD card) when sdmmc3 is enabled.

3.2. Runtime[edit source]

3.2.1. Overview[edit source]

On STM32MP13x lines only, the SDMMC1/2 instances can be allocated to the Arm^® Cortex^®-A7 secure context but this is not supported in OpenSTLinux.

All the SDMMC instances can be allocated to the Arm^® Cortex^®-A7 non-secure core to be controlled in Linux^® by the MMC framework.

On STM32MP15x lines only, SDMMC3 can be allocated to the Arm^® Cortex^®-M4 to be controlled in STM32Cube MPU Package by STM32Cube SDMMC driver.

Chapter #Peripheral assignment describes which peripheral instance can be assigned to which context.

3.2.2. Software frameworks[edit source]

3.2.2.1. On STM32MP13x lines [edit source]

Domain	Peripheral	Software components		Comment
Domain	Peripheral	OP-TEE	Linux	Comment
Mass storage	SDMMC		Linux MMC framework

3.2.2.2. On STM32MP15x lines [edit source]

Domain	Peripheral	Software components			Comment
Domain	Peripheral	OP-TEE	Linux	STM32Cube	Comment
Mass storage	SDMMC		Linux MMC framework	STM32Cube SDMMC driver

3.2.3. Peripheral configuration[edit source]

The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.

For Linux^® kernel configuration, please refer to SDMMC device tree configuration.

3.2.4. Peripheral assignment[edit source]

3.2.4.1. On STM32MP13x lines [edit source]

Click on the right to expand the legend...

STM32MP13 internal peripherals

Check boxes illustrate the possible peripheral allocations supported by STM32 MPU Embedded Software:

☐ means that the peripheral can be assigned (☑) to the given runtime context.
⬚ means that the peripheral can be assigned to the given runtime context, but this configuration is not supported in STM32 MPU Embedded Software distribution.
✓ is used for system peripherals that cannot be unchecked because they are statically connected in the device.

Refer to How to assign an internal peripheral to a runtime context for more information on how to assign peripherals manually or via STM32CubeMX.
The present chapter describes STMicroelectronics recommendations or choice of implementation. Additional possiblities might be described in STM32MP13 reference manuals.

Domain	Peripheral	Runtime allocation			Comment
Domain	Peripheral	Instance	Cortex-A7 secure (OP-TEE)	Cortex-A7 non-secure (Linux)	Comment
Mass storage	SDMMC	SDMMC1	⬚	☐	Assignment (single choice)
Mass storage	SDMMC	SDMMC2	⬚	☐	Assignment (single choice)

3.2.4.2. On STM32MP15x lines [edit source]