LTDC device tree configuration

Applicable for

STM32MP13x lines, STM32MP15x lines

---

1. Article purpose

This article explains how to configure the LTDC when the peripheral is assigned to the Linux^® OS.

The configuration is performed using the device tree mechanism .

The Device tree provides a hardware description of the LTDC used by the STM32 LTDC Linux driver.

2. DT bindings documentation

The LTDC is represented by the STM32 LTDC device tree bindings .

3. DT configuration

This hardware description is a combination of the STM32 microprocessor device tree files (.dtsi extension) and board device tree files (.dts extension). See the Device tree for an explanation of the device tree file split.

STM32CubeMX can be used to generate the board device tree. Refer to How to configure the DT using STM32CubeMX for more details.

Warning

The below device tree examples are related to the STM32MP15x lines. The STM32MP13x lines device tree examples will be added in the future. Meanwhile please refer to the related Linux kernel source code.

3.1. DT configuration (STM32 level)

The LTDC device tree node is declared in:

• arch/arm/boot/dts/stm32mp135.dtsi on STM32MP13x lines

/ {
	soc {
...
		ltdc: display-controller@5a001000 {
			compatible = "st,stm32-ltdc";
			reg = <0x5a001000 0x400>;
			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LTDC_PX>;
			clock-names = "lcd";
			resets = <&scmi_reset RST_SCMI_LTDC>;
			status = "disabled";
		};
	};
};

• arch/arm/boot/dts/stm32mp151.dtsi on STM32MP15x lines

/ {
	soc {
...
		ltdc: display-controller@5a001000 {
			compatible = "st,stm32-ltdc";
			reg = <0x5a001000 0x400>;
			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&rcc LTDC_PX>;
			clock-names = "lcd";
			resets = <&rcc LTDC_R>;
			status = "disabled";

			port {
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};
};

The declaration (shown above) provides the hardware registers base address, the clocks, the interrupts and the reset. The port may be pre-populated to facilitate its use in the many other device tree files.

Warning

This device tree part is related to STM32 microprocessors. It must be kept as is, without being modified by the end-user.

3.2. DT configuration (board level)

The LTDC device tree related to a particular board may have the following nodes, depending on the board hardware:

• ltdc node: containing the LTDC pinctrl references and the in/out port descriptions
• panel or i2cx bridge rgb node (depending of the board hardware): containing the in/out port descriptions related to the LTDC node
• panel_backlight node (depending of the board hardware): related to the panel or bridge node

A full example of the LTDC pins is available in:

• arch/arm/boot/dts/stm32mp13-pinctrl.dtsi on STM32MP13x lines

&pinctrl {
...
	ltdc_pins_a: ltdc-0 {
		pins {
			pinmux = <STM32_PINMUX('D',  9, AF13)>, /* LCD_CLK */
				 <STM32_PINMUX('C',  6, AF14)>, /* LCD_HSYNC */
				 <STM32_PINMUX('G',  4, AF11)>, /* LCD_VSYNC */
				 <STM32_PINMUX('H',  9, AF11)>, /* LCD_DE */
				 <STM32_PINMUX('G',  7, AF14)>, /* LCD_R2 */
				 <STM32_PINMUX('B', 12, AF13)>, /* LCD_R3 */
				 <STM32_PINMUX('D', 14, AF14)>, /* LCD_R4 */
				 <STM32_PINMUX('E',  7, AF14)>, /* LCD_R5 */
				 <STM32_PINMUX('E', 13, AF14)>, /* LCD_R6 */
				 <STM32_PINMUX('E',  9, AF14)>, /* LCD_R7 */
				 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
				 <STM32_PINMUX('F',  3, AF14)>, /* LCD_G3 */
				 <STM32_PINMUX('D',  5, AF14)>, /* LCD_G4 */
				 <STM32_PINMUX('G',  0, AF14)>, /* LCD_G5 */
				 <STM32_PINMUX('C',  7, AF14)>, /* LCD_G6 */
				 <STM32_PINMUX('A', 15, AF11)>, /* LCD_G7 */
				 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B2 */
				 <STM32_PINMUX('F',  2, AF14)>, /* LCD_B3 */
				 <STM32_PINMUX('H', 14, AF11)>, /* LCD_B4 */
				 <STM32_PINMUX('E',  0, AF14)>, /* LCD_B5 */
				 <STM32_PINMUX('B',  6, AF7)>,  /* LCD_B6 */
				 <STM32_PINMUX('F',  1, AF13)>; /* LCD_B7 */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	ltdc_sleep_pins_a: ltdc-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_CLK */
				 <STM32_PINMUX('C',  6, ANALOG)>, /* LCD_HSYNC */
				 <STM32_PINMUX('G',  4, ANALOG)>, /* LCD_VSYNC */
				 <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_DE */
				 <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_R2 */
				 <STM32_PINMUX('B', 12, ANALOG)>, /* LCD_R3 */
				 <STM32_PINMUX('D', 14, ANALOG)>, /* LCD_R4 */
				 <STM32_PINMUX('E',  7, ANALOG)>, /* LCD_R5 */
				 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_R6 */
				 <STM32_PINMUX('E',  9, ANALOG)>, /* LCD_R7 */
				 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
				 <STM32_PINMUX('F',  3, ANALOG)>, /* LCD_G3 */
				 <STM32_PINMUX('D',  5, ANALOG)>, /* LCD_G4 */
				 <STM32_PINMUX('G',  0, ANALOG)>, /* LCD_G5 */
				 <STM32_PINMUX('C',  7, ANALOG)>, /* LCD_G6 */
				 <STM32_PINMUX('A', 15, ANALOG)>, /* LCD_G7 */
				 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B2 */
				 <STM32_PINMUX('F',  2, ANALOG)>, /* LCD_B3 */
				 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_B4 */
				 <STM32_PINMUX('E',  0, ANALOG)>, /* LCD_B5 */
				 <STM32_PINMUX('B',  6, ANALOG)>, /* LCD_B6 */
				 <STM32_PINMUX('F',  1, ANALOG)>; /* LCD_B7 */
		};
	};
...
};

• arch/arm/boot/dts/stm32mp15-pinctrl.dtsi on STM32MP15x lines

&pinctrl {
...
	ltdc_pins_a: ltdc-0 {
		pins {
			pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
				 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
				 <STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
				 <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
				 <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
				 <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
				 <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
				 <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
				 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
				 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
				 <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
				 <STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
				 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
				 <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
				 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
				 <STM32_PINMUX('I',  0, AF14)>, /* LCD_G5 */
				 <STM32_PINMUX('I',  1, AF14)>, /* LCD_G6 */
				 <STM32_PINMUX('I',  2, AF14)>, /* LCD_G7 */
				 <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
				 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
				 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
				 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
				 <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
				 <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
				 <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
				 <STM32_PINMUX('D',  8, AF14)>; /* LCD_B7 */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	ltdc_sleep_pins_a: ltdc-sleep-0 {
		pins {
			pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
				 <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
				 <STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
				 <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
				 <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
				 <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
				 <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
				 <STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
				 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
				 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
				 <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
				 <STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
				 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
				 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
				 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
				 <STM32_PINMUX('I',  0, ANALOG)>, /* LCD_G5 */
				 <STM32_PINMUX('I',  1, ANALOG)>, /* LCD_G6 */
				 <STM32_PINMUX('I',  2, ANALOG)>, /* LCD_G7 */
				 <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
				 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
				 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
				 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
				 <STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
				 <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
				 <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
				 <STM32_PINMUX('D',  8, ANALOG)>; /* LCD_B7 */
		};
	};

	ltdc_pins_b: ltdc-1 {
		pins {
			pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
				 <STM32_PINMUX('K',  7, AF14)>, /* LCD_DE */
				 <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
				 <STM32_PINMUX('J',  0, AF14)>, /* LCD_R1 */
				 <STM32_PINMUX('J',  1, AF14)>, /* LCD_R2 */
				 <STM32_PINMUX('J',  2, AF14)>, /* LCD_R3 */
				 <STM32_PINMUX('J',  3, AF14)>, /* LCD_R4 */
				 <STM32_PINMUX('J',  4, AF14)>, /* LCD_R5 */
				 <STM32_PINMUX('J',  5, AF14)>, /* LCD_R6 */
				 <STM32_PINMUX('J',  6, AF14)>, /* LCD_R7 */
				 <STM32_PINMUX('J',  7, AF14)>, /* LCD_G0 */
				 <STM32_PINMUX('J',  8, AF14)>, /* LCD_G1 */
				 <STM32_PINMUX('J',  9, AF14)>, /* LCD_G2 */
				 <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
				 <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
				 <STM32_PINMUX('K',  0, AF14)>, /* LCD_G5 */
				 <STM32_PINMUX('K',  1, AF14)>, /* LCD_G6 */
				 <STM32_PINMUX('K',  2, AF14)>, /* LCD_G7 */
				 <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
				 <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
				 <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
				 <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
				 <STM32_PINMUX('K',  3, AF14)>, /* LCD_B4 */
				 <STM32_PINMUX('K',  4, AF14)>, /* LCD_B5 */
				 <STM32_PINMUX('K',  5, AF14)>, /* LCD_B6 */
				 <STM32_PINMUX('K',  6, AF14)>; /* LCD_B7 */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	ltdc_sleep_pins_b: ltdc-sleep-1 {
		pins {
			pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
				 <STM32_PINMUX('K',  7, ANALOG)>, /* LCD_DE */
				 <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
				 <STM32_PINMUX('J',  0, ANALOG)>, /* LCD_R1 */
				 <STM32_PINMUX('J',  1, ANALOG)>, /* LCD_R2 */
				 <STM32_PINMUX('J',  2, ANALOG)>, /* LCD_R3 */
				 <STM32_PINMUX('J',  3, ANALOG)>, /* LCD_R4 */
				 <STM32_PINMUX('J',  4, ANALOG)>, /* LCD_R5 */
				 <STM32_PINMUX('J',  5, ANALOG)>, /* LCD_R6 */
				 <STM32_PINMUX('J',  6, ANALOG)>, /* LCD_R7 */
				 <STM32_PINMUX('J',  7, ANALOG)>, /* LCD_G0 */
				 <STM32_PINMUX('J',  8, ANALOG)>, /* LCD_G1 */
				 <STM32_PINMUX('J',  9, ANALOG)>, /* LCD_G2 */
				 <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
				 <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
				 <STM32_PINMUX('K',  0, ANALOG)>, /* LCD_G5 */
				 <STM32_PINMUX('K',  1, ANALOG)>, /* LCD_G6 */
				 <STM32_PINMUX('K',  2, ANALOG)>, /* LCD_G7 */
				 <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
				 <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
				 <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
				 <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
				 <STM32_PINMUX('K',  3, ANALOG)>, /* LCD_B4 */
				 <STM32_PINMUX('K',  4, ANALOG)>, /* LCD_B5 */
				 <STM32_PINMUX('K',  5, ANALOG)>, /* LCD_B6 */
				 <STM32_PINMUX('K',  6, ANALOG)>; /* LCD_B7 */
		};
	};

	ltdc_pins_c: ltdc-2 {
		pins1 {
			pinmux = <STM32_PINMUX('B',  1, AF9)>,  /* LTDC_R6 */
				 <STM32_PINMUX('B',  9, AF14)>, /* LTDC_B7 */
				 <STM32_PINMUX('C',  0, AF14)>, /* LTDC_R5 */
				 <STM32_PINMUX('D',  3, AF14)>, /* LTDC_G7 */
				 <STM32_PINMUX('D',  6, AF14)>, /* LTDC_B2 */
				 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
				 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
				 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
				 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
				 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
				 <STM32_PINMUX('H',  4, AF9)>,  /* LTDC_G5 */
				 <STM32_PINMUX('H',  8, AF14)>, /* LTDC_R2 */
				 <STM32_PINMUX('H',  9, AF14)>, /* LTDC_R3 */
				 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
				 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
				 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
				 <STM32_PINMUX('I',  1, AF14)>, /* LTDC_G6 */
				 <STM32_PINMUX('I',  5, AF14)>, /* LTDC_B5 */
				 <STM32_PINMUX('I',  6, AF14)>, /* LTDC_B6 */
				 <STM32_PINMUX('I',  9, AF14)>, /* LTDC_VSYNC */
				 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	ltdc_sleep_pins_c: ltdc-sleep-2 {
		pins1 {
			pinmux = <STM32_PINMUX('B', 1, ANALOG)>,  /* LTDC_R6 */
				 <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
				 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
				 <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
				 <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
				 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
				 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
				 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
				 <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
				 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
				 <STM32_PINMUX('H', 4, ANALOG)>,  /* LTDC_G5 */
				 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
				 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
				 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
				 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
				 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
				 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
				 <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
				 <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
				 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
				 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
				 <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
		};
	};

	ltdc_pins_d: ltdc-3 {
		pins1 {
			pinmux = <STM32_PINMUX('G',  7, AF14)>; /* LCD_CLK */
			bias-disable;
			drive-push-pull;
			slew-rate = <3>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
				 <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
				 <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
				 <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
				 <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
				 <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
				 <STM32_PINMUX('A',  5, AF14)>, /* LCD_R4 */
				 <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
				 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
				 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
				 <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
				 <STM32_PINMUX('B',  0, AF14)>, /* LCD_G1 */
				 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
				 <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
				 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
				 <STM32_PINMUX('H',  4,  AF9)>, /* LCD_G5 */
				 <STM32_PINMUX('I', 11,  AF9)>, /* LCD_G6 */
				 <STM32_PINMUX('G',  8, AF14)>, /* LCD_G7 */
				 <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
				 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
				 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
				 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
				 <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
				 <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
				 <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
				 <STM32_PINMUX('I',  7, AF14)>; /* LCD_B7 */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
	};

	ltdc_sleep_pins_d: ltdc-sleep-3 {
		pins {
			pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
				 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
				 <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
				 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
				 <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
				 <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
				 <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
				 <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
				 <STM32_PINMUX('A',  5, ANALOG)>, /* LCD_R4 */
				 <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
				 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
				 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
				 <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
				 <STM32_PINMUX('B',  0, ANALOG)>, /* LCD_G1 */
				 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
				 <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
				 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
				 <STM32_PINMUX('H',  4, ANALOG)>, /* LCD_G5 */
				 <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
				 <STM32_PINMUX('G',  8, ANALOG)>, /* LCD_G7 */
				 <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
				 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
				 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
				 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
				 <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
				 <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
				 <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
				 <STM32_PINMUX('I',  7, ANALOG)>; /* LCD_B7 */
		};
	};
...
};

A full example of the:

• STM32MP13x Discovery board device tree is available arch/arm/boot/dts/stm32mp135f-dk.dts on STM32MP13x lines

/ {
...
	panel_rgb: panel-rgb {
		compatible = "rocktech,rk043fn48h", "panel-dpi";
		enable-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>;
		backlight = <&panel_backlight>;
		power-supply = <&scmi_v3v3_sw>;
		status = "okay";

		width-mm = <105>;
		height-mm = <67>;

		port {
			panel_in_rgb: endpoint {
				remote-endpoint = <&ltdc_out_rgb>;
			};
		};

		panel-timing {
			clock-frequency = <10000000>;
			hactive = <480>;
			vactive = <272>;
			hsync-len = <52>;
			hfront-porch = <10>;
			hback-porch = <10>;
			vsync-len = <10>;
			vfront-porch = <10>;
			vback-porch = <10>;
		};
	};
...
};
...
&ltdc {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ltdc_pins_a>;
	pinctrl-1 = <&ltdc_sleep_pins_a>;
	status = "okay";

	port {
		#address-cells = <1>;
		#size-cells = <0>;

		ltdc_out_rgb: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&panel_in_rgb>;
		};
	};
};

• STM32MP15x Discovery board device tree is available arch/arm/boot/dts/stm32mp15xx-dkx.dtsi on STM32MP15x lines

...
&i2c1 {
...
	hdmi-transmitter@39 {
		compatible = "sil,sii9022";
		reg = <0x39>;
		iovcc-supply = <&v3v3_hdmi>;
		cvcc12-supply = <&v1v2_hdmi>;
		reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
		interrupt-parent = <&gpiog>;
		#sound-dai-cells = <0>;
		status = "okay";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				sii9022_in: endpoint {
					remote-endpoint = <&ltdc_ep0_out>;
				};
			};

			port@3 {
				reg = <3>;
				sii9022_tx_endpoint: endpoint {
					remote-endpoint = <&i2s2_endpoint>;
				};
			};
		};
	};
...
};
&ltdc {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ltdc_pins_a>;
	pinctrl-1 = <&ltdc_sleep_pins_a>;
	status = "okay";

	port {
		ltdc_ep0_out: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&sii9022_in>;
		};
	};
};

4. How to configure the DT using STM32CubeMX

The STM32CubeMX tool can be used to configure the STM32MPU device and get the corresponding platform configuration device tree files.
The STM32CubeMX may not support all the properties described in the above DT bindings documentation paragraph. If so, the tool inserts user sections in the generated device tree. These sections can then be edited to add some properties and they are preserved from one generation to another. Refer to STM32CubeMX user manual for further information.

5. References

Please refer to the following links for additional information:

LCD TFT display controller (STM32 specific)

Linux^® is a registered trademark of Linus Torvalds.

Operating system

Device tree

Generic interrupt controller

Serial peripheral interface

System control and management interface

General-purpose input/output (A realization of open ended transmission between devices on an embedded level. These pins available on a processor can be programmed to be used to either accept input or provide output to external devices depending on user desires and applications requirements.)

LCD TFT display controller (STM32 specific)

Linux^® is a registered trademark of Linus Torvalds.

Operating system

Device tree

Generic interrupt controller

Serial peripheral interface

System control and management interface

General-purpose input/output (A realization of open ended transmission between devices on an embedded level. These pins available on a processor can be programmed to be used to either accept input or provide output to external devices depending on user desires and applications requirements.)