1. Article purpose[edit source]
The purpose of this article is to:
- briefly introduce the DBGMCU peripheral and its main features
- indicate the level of security supported by this hardware block
- explain how each instance can be allocated to the runtime contexts and linked to the corresponding software components
- explain, when necessary, how to configure the DBGMCU peripheral.
2. Peripheral overview[edit source]
The DBGMCU peripheral is used to configure internal peripherals behavior when one of the available cores enters in debug mode.
For instance, it allows to freeze a watchdog (IWDG) to avoid getting a watchdog reset when the Cortex®-A7 enters in debug mode (via a breakpoint or JTAG break).
2.1. Features[edit source]
Refer to the STM32MP13 reference manuals or STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are implemented.
2.2. Security support[edit source]
The DBGMCU is a non secure peripheral.
3. Peripheral usage and associated software[edit source]
3.1. Boot time[edit source]
DBGMCU is used by the boot chain to get the device ID and revision, to adapt its behavior accordingly.
During a debug session, the DBGMCU can be accessed via the debug access port (DAP) to configure the expected behavior on break, typically to get IWDG2 frozen when the Cortex®-A7 enters in debug mode.
3.2. Runtime[edit source]
3.2.1. Overview[edit source]
There is no real runtime support for DBGMCU.
3.2.2. Software frameworks[edit source]
3.2.2.1. On STM32MP13x lines 
[edit source]
3.2.2.2. On STM32MP15x lines [edit source]
3.2.3. Peripheral configuration[edit source]
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.
3.2.4. Peripheral assignment[edit source]
3.2.4.1. On STM32MP13x lines [edit source]
Click on the right to expand the legend...
| Domain | Peripheral | Runtime allocation | Comment | ||
|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) | |||
| Trace & Debug | DBGMCU | DBGMCU | No assignment | ||
3.2.4.2. On STM32MP15x lines [edit source]
Click on the right to expand the legend...
| Domain | Peripheral | Runtime allocation | Comment | |||
|---|---|---|---|---|---|---|
| Instance | Cortex-A7 secure (OP-TEE) |
Cortex-A7 non-secure (Linux) |
Cortex-M4 (STM32Cube) | |||
| Trace & Debug | DBGMCU | DBGMCU | No assignment | |||